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- 2018
-
Mark
MPEG reconfigurable video coding
2018) p.213-249(
- Chapter in Book/Report/Conference proceeding › Book chapter
- 2017
-
Mark
High-level system synthesis and optimization of dataflow programs for MPSoCs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Trace-based manycore partitioning of stream-processing applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2016
-
Mark
Clock-gating of streaming applications for energy efficient implementations on FPGAs
(
- Contribution to journal › Article
-
Mark
High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms
2016) International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVI) p.227-234(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
Characterizing communication behavior of dataflow programs using trace analysis
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Coarse grain clock gating of streaming applications in programmable logic implementations
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Turnus: An open-source design space exploration framework for dynamic stream programs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
MPEG Reconfigurable Video Coding
2013) p.281-314(
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
High-level Synthesis of Dataflow Programs for Signal Processing Systems
2013) 8th International Symposium on Image and Signal Processing and Analysis (ISPA 2013)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Buffer Optimization Based on Critical Path Analysis of a Dataflow Program Design
2013) IEEE International Symposium on Circuits and Systems (ISCAS), 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
TURNUS: a Design Exploration Framework for Dataflow System Design
2013) IEEE International Symposium on Circuits and Systems (ISCAS), 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Synthesis and optimization of high-level stream programs
2013) The 2013 Electronic System Level Synthesis Conference(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Representing Guard Dependencies in Dataflow Execution Traces
2013) Fifth International Conference on Computational Intelligence, Communication Systems, and Networks (CICSyN) p.291-295(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Systems Design Space Exploration by Serial Dataflow Program Executions
2013) 47th Annual Asilomar Conference on Signals, Systems, and Computers, 2003(
- Contribution to conference › Paper, not in proceeding
-
Mark
Design Space Exploration of High-Level Stream Programs on Parallel Architectures
2013) 8th International Symposium on Image and Signal Processing and Analysis (ISPA 2013)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Multi-Clock-Domain Optimization for Reconfigurable Architectures in High-Level Dataflow Applications
2013) 47th Annual Asilomar Conference on Signals, Systems, and Computers, 2003(
- Contribution to conference › Paper, not in proceeding
-
Mark
Partitioning and Optimization of High-Level Stream Applications for Multi-Clock-Domain Architectures
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design space exploration and implementation of RVC-CAL applications using the TURNUS framework
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Methods to explore design space for MPEG RVC codec specifications
(
- Contribution to journal › Article
- 2011
-
Mark
Optimization of portable parallel signal processing applications by design space exploration of dataflow programs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Guest Editorial: Special Issue on Reconfigurable Video Coding
(
- Contribution to journal › Letter
-
Mark
Overview of the MPEG Reconfigurable Video Coding Framework
(
- Contribution to journal › Article