Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon
(2020) In IEEE Electron Device Letters 41(9). p.1432-1435- Abstract
- III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore’s law owing to their excellent material properties. To integrate highly scaled memory cells coupled with high performance selectors at minimal memory cell area, it is attractive to integrate low-power resistive random access memory (RRAM) cells directly on to III-V VNW-FETs. In this work, we report the experimental demonstration of successful RRAM integration with III-V VNW-FETs. The combined use of VNW-FET drain metal electrode and the RRAM bottom electrode reduces the process complexity and maintains material compatibility. The vertical nanowire geometry allows the RRAM cell area to be aggressively scaled down to 0.01 μm2 enabling realization of dense memory... (More)
- III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore’s law owing to their excellent material properties. To integrate highly scaled memory cells coupled with high performance selectors at minimal memory cell area, it is attractive to integrate low-power resistive random access memory (RRAM) cells directly on to III-V VNW-FETs. In this work, we report the experimental demonstration of successful RRAM integration with III-V VNW-FETs. The combined use of VNW-FET drain metal electrode and the RRAM bottom electrode reduces the process complexity and maintains material compatibility. The vertical nanowire geometry allows the RRAM cell area to be aggressively scaled down to 0.01 μm2 enabling realization of dense memory (1T1R) cross-point arrays on silicon. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/a15c7c99-e03f-4a89-922f-1ec4dedfcaa7
- author
- Mamidala, Saketh, Ram LU ; Persson, Karl-Magnus LU ; Borg, Mattias LU and Wernersson, Lars-Erik LU
- organization
- publishing date
- 2020-08-03
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- Resistive random access memory (RRAM), 1T1R, Vertical nanowire, Gate-All-Around MOSFET, ITO
- in
- IEEE Electron Device Letters
- volume
- 41
- issue
- 9
- article number
- 9154433
- pages
- 1432 - 1435
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- scopus:85091038249
- ISSN
- 0741-3106
- DOI
- 10.1109/LED.2020.3013674
- language
- English
- LU publication?
- yes
- id
- a15c7c99-e03f-4a89-922f-1ec4dedfcaa7
- date added to LUP
- 2020-08-14 15:12:58
- date last changed
- 2023-11-20 09:23:27
@article{a15c7c99-e03f-4a89-922f-1ec4dedfcaa7, abstract = {{III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore’s law owing to their excellent material properties. To integrate highly scaled memory cells coupled with high performance selectors at minimal memory cell area, it is attractive to integrate low-power resistive random access memory (RRAM) cells directly on to III-V VNW-FETs. In this work, we report the experimental demonstration of successful RRAM integration with III-V VNW-FETs. The combined use of VNW-FET drain metal electrode and the RRAM bottom electrode reduces the process complexity and maintains material compatibility. The vertical nanowire geometry allows the RRAM cell area to be aggressively scaled down to 0.01 μm2 enabling realization of dense memory (1T1R) cross-point arrays on silicon.}}, author = {{Mamidala, Saketh, Ram and Persson, Karl-Magnus and Borg, Mattias and Wernersson, Lars-Erik}}, issn = {{0741-3106}}, keywords = {{Resistive random access memory (RRAM); 1T1R; Vertical nanowire; Gate-All-Around MOSFET; ITO}}, language = {{eng}}, month = {{08}}, number = {{9}}, pages = {{1432--1435}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Electron Device Letters}}, title = {{Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon}}, url = {{https://lup.lub.lu.se/search/files/82664137/09154433_Saketh_EDL_1_4.pdf}}, doi = {{10.1109/LED.2020.3013674}}, volume = {{41}}, year = {{2020}}, }