Cryogenic NDRO in Conventional Non-Interface-Engineered HZO-Based MFM Capacitors
(2026) In IEEE Journal of the Electron Devices Society 14. p.740-745- Abstract
- Cryogenic non-volatile memory technologies are crucial for realizing energy-efficient and scalable quantum computing systems. Ferroelectric capacitors (FeCAPs) are promising candidates; however, conventional readout relies on polarization switching, resulting in destructive operation. In this work, we demonstrate the cryogenic implementation of non-destructive capacitive readout (NDRO) in conventional Hf0.5Zr0.5O2-based capacitors down to 10 K. By exploiting the capacitance difference between polarization states, stable readout at Vread = 0 V is achieved without perturbing the stored state. The devices exhibit stable retention over 1000 s and low variability across devices and repeated reads at room temperature, 77 K, and 10 K. Multilevel... (More)
- Cryogenic non-volatile memory technologies are crucial for realizing energy-efficient and scalable quantum computing systems. Ferroelectric capacitors (FeCAPs) are promising candidates; however, conventional readout relies on polarization switching, resulting in destructive operation. In this work, we demonstrate the cryogenic implementation of non-destructive capacitive readout (NDRO) in conventional Hf0.5Zr0.5O2-based capacitors down to 10 K. By exploiting the capacitance difference between polarization states, stable readout at Vread = 0 V is achieved without perturbing the stored state. The devices exhibit stable retention over 1000 s and low variability across devices and repeated reads at room temperature, 77 K, and 10 K. Multilevel operation is demonstrated at 10 K with multiple distinct capacitance states maintained under NDRO conditions. Endurance measurements at 10 K show clear state separation beyond 107 cycles. Analysis of the temperature-dependent behaviour indicates that imprint-induced asymmetry plays a key role in enabling reliable state discrimination at cryogenic temperatures, despite the reduction in absolute capacitance with decreasing temperature. These results demonstrate the feasibility of NDRO in standard nominally symmetric ferroelectric capacitors at cryogenic temperatures without deliberate interface engineering, highlighting their potential for cryogenic memory and in-memory computing applications. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/dc23b109-bb0c-416e-9140-b019a4f9db7b
- author
- Mamidala, Karthik Ram
LU
; Andersen, André
LU
and Wernersson, Lars-Erik
LU
- organization
- publishing date
- 2026-08-13
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- Cryogenic electronics, Ferroelectric (FE) devices, HZO, Multilevel, Memcapacitors, Non-volatile memory, Non-desctructive read out, NDRO
- in
- IEEE Journal of the Electron Devices Society
- volume
- 14
- pages
- 740 - 745
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- ISSN
- 2168-6734
- DOI
- 10.1109/JEDS.2026.3723559
- language
- English
- LU publication?
- yes
- additional info
- Mamidala Karthik Ram and André Andersen contributed equally
- id
- dc23b109-bb0c-416e-9140-b019a4f9db7b
- date added to LUP
- 2026-08-14 15:36:55
- date last changed
- 2026-09-02 09:49:27
@article{dc23b109-bb0c-416e-9140-b019a4f9db7b,
abstract = {{Cryogenic non-volatile memory technologies are crucial for realizing energy-efficient and scalable quantum computing systems. Ferroelectric capacitors (FeCAPs) are promising candidates; however, conventional readout relies on polarization switching, resulting in destructive operation. In this work, we demonstrate the cryogenic implementation of non-destructive capacitive readout (NDRO) in conventional Hf0.5Zr0.5O2-based capacitors down to 10 K. By exploiting the capacitance difference between polarization states, stable readout at Vread = 0 V is achieved without perturbing the stored state. The devices exhibit stable retention over 1000 s and low variability across devices and repeated reads at room temperature, 77 K, and 10 K. Multilevel operation is demonstrated at 10 K with multiple distinct capacitance states maintained under NDRO conditions. Endurance measurements at 10 K show clear state separation beyond 107 cycles. Analysis of the temperature-dependent behaviour indicates that imprint-induced asymmetry plays a key role in enabling reliable state discrimination at cryogenic temperatures, despite the reduction in absolute capacitance with decreasing temperature. These results demonstrate the feasibility of NDRO in standard nominally symmetric ferroelectric capacitors at cryogenic temperatures without deliberate interface engineering, highlighting their potential for cryogenic memory and in-memory computing applications.}},
author = {{Mamidala, Karthik Ram and Andersen, André and Wernersson, Lars-Erik}},
issn = {{2168-6734}},
keywords = {{Cryogenic electronics; Ferroelectric (FE) devices; HZO; Multilevel; Memcapacitors; Non-volatile memory; Non-desctructive read out; NDRO}},
language = {{eng}},
month = {{08}},
pages = {{740--745}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
series = {{IEEE Journal of the Electron Devices Society}},
title = {{Cryogenic NDRO in Conventional Non-Interface-Engineered HZO-Based MFM Capacitors}},
url = {{http://dx.doi.org/10.1109/JEDS.2026.3723559}},
doi = {{10.1109/JEDS.2026.3723559}},
volume = {{14}},
year = {{2026}},
}