Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
(2023) In IEEE Electron Device Letters 44(7). p.1212-1215- Abstract
We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low temperature measurements reveal a negative output conductance indicating self-heating in the transistor. Under pulsed measurements, an increase in drain current (15%) and transconductance (30%) are observed at room temperature, with values influenced by the pulse width. This effect on performance is quantified with determination of the thermal resistance and capacitance. Furthermore, a first order thermal circuit is modelled based on the thermal impedances. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with... (More)
We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low temperature measurements reveal a negative output conductance indicating self-heating in the transistor. Under pulsed measurements, an increase in drain current (15%) and transconductance (30%) are observed at room temperature, with values influenced by the pulse width. This effect on performance is quantified with determination of the thermal resistance and capacitance. Furthermore, a first order thermal circuit is modelled based on the thermal impedances. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with a thermal time constant of 1~μ s. We find that self-heating is a limiting factor for device performance.
(Less)
- author
- Rangasamy, Gautham
LU
; Ram, Mamidala Saketh
LU
; Fhager, Lars Ohlsson LU
and Wernersson, Lars Erik LU
- organization
- publishing date
- 2023-07-01
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- III-V, MOSFETs, self-heating, vertical nanowires
- in
- IEEE Electron Device Letters
- volume
- 44
- issue
- 7
- pages
- 4 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- scopus:85159845126
- ISSN
- 0741-3106
- DOI
- 10.1109/LED.2023.3273785
- language
- English
- LU publication?
- yes
- id
- fb0fc080-578d-4925-a145-439c7e8014dc
- date added to LUP
- 2023-09-25 13:52:28
- date last changed
- 2023-11-21 23:05:43
@article{fb0fc080-578d-4925-a145-439c7e8014dc, abstract = {{<p>We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low temperature measurements reveal a negative output conductance indicating self-heating in the transistor. Under pulsed measurements, an increase in drain current (15%) and transconductance (30%) are observed at room temperature, with values influenced by the pulse width. This effect on performance is quantified with determination of the thermal resistance and capacitance. Furthermore, a first order thermal circuit is modelled based on the thermal impedances. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with a thermal time constant of 1~μ s. We find that self-heating is a limiting factor for device performance.</p>}}, author = {{Rangasamy, Gautham and Ram, Mamidala Saketh and Fhager, Lars Ohlsson and Wernersson, Lars Erik}}, issn = {{0741-3106}}, keywords = {{III-V; MOSFETs; self-heating; vertical nanowires}}, language = {{eng}}, month = {{07}}, number = {{7}}, pages = {{1212--1215}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Electron Device Letters}}, title = {{Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs}}, url = {{http://dx.doi.org/10.1109/LED.2023.3273785}}, doi = {{10.1109/LED.2023.3273785}}, volume = {{44}}, year = {{2023}}, }