Elektronikkonstruktion-lup-obsolete
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- 2010
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Mark
Impact of MOS threshold-voltage mismatch in current-steering DACs for CT delta-sigma modulators
- Contribution to conference › Paper, not in proceeding
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Mark
Minimum-energy sub-threshold self-timed circuits: design methodology and a case study
(2010) The 16th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Low power analog channel decoder in sub-threshold 65nm CMOS
(2010) Swedish System-on-Chip Conference 2010 (SSoCC'10)
- Contribution to conference › Paper, not in proceeding
- 2009
-
Mark
Binary Morphology With Spatially Variant Structuring Elements: Algorithm and Architecture
- Contribution to journal › Article
-
Mark
Analysis of a high frequency and wide bandwidth active polyphase filter based on CMOS inverters
Wernehag, Johan LU and Sjöland, Henrik LU
(2009)
In Analog Integrated Circuits and Signal Processing
59(3).
p.243-255
- Contribution to journal › Article
-
Mark
Third-order nonlinearity vs. load impedance for CMOS low-noise amplifiers
- Contribution to journal › Article
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Mark
Design and measurement of a CT delta-sigma ADC with switched-capacitor switched-resistor feedback
- Contribution to journal › Article
-
Mark
Parabolic synthesis methodology implemented on the sine function
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Two 24 GHz Receiver Front-ends in 130-nm CMOS using SOP Technology
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding