Oskar Andersson (Former)
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- 2016
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Mark
Ultra-low Voltage Embedded Memories – Design Aspects and a Biomedical Use-case
2016)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Improving practical sensitivity of energy optimized wake-up receivers : Proof of concept in 65nm CMOS
(
- Contribution to journal › Article
- 2015
-
Mark
A 290mV sub-VT ASIC for Real-Time Atrial Fibrillation Detection
(
- Contribution to journal › Article
-
Mark
Reconfigurable and Selectively-Adaptive Signal Processing for Multi-Mode Wireless Communication
2015) SiPS(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 400 mV Atrial Fibrillation Detector with 0.56 pJ/Operation in 65 nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
A 35 fJ/bit-access Sub-VT Memory Using a Dual-Bit Area-Optimized Standard-cell in 65 nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 0.28-0.8 V 320 fW D-latch for Sub-VT Memories in 65 nm CMOS
2014) FTFC(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
Dual-VT 4kb Sub-VT Memories with <1 pW/bit Leakage in 65 nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 65-nm CMOS Area Optimized De-synchronization Flow for sub-V-T Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Two Flavors of 4kb Standard-Cell Based Subvt Memory in 65 nm CMOS
2013) Swedish System-On-Chip Conference (SSoCC), 2013(
- Contribution to conference › Paper, not in proceeding