Henrik Sjöland
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- 2013
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Mark
Photodiodes in Deep Submicron CMOS Process for Fully Integrated Optical Receivers
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- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback
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- Contribution to journal › Article
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Introduction to the Special Issue on 29th NORCHIP Conference
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- Contribution to journal › Debate/Note/Editorial
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Mark
Analog and Digital Approaches for an Energy Efficient Low Complexity Channel Decoder
2013) IEEE International Symposium on Circuits and Systems (ISCAS), 2013 In Proceedings - IEEE International Symposium on Circuits and Systems p.1564-1567(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Wideband SAW-Less Receiver Front-End with Harmonic Rejection Mixer in 65-nm CMOS
(
- Contribution to journal › Article
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Mark
Ultra Low Energy Design Exploration of Digital Decimation Filters in 65 nm Dual-VT CMOS in the Sub-VT Domain
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- Contribution to journal › Article
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Mark
Performance evaluation of N-well/P-sub photodiodes in 65nm CMOS process
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- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 3 mu W 500 kb/s Ultra Low Power Analog Decoder with Digital I/O in 65 nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 31.25/125MSps Continuous-Time Delta-Sigma ADC with 64/59dB SNDR in 130nm CMOS
2013) NORCHIP Conference, 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Analog and Digital Design Alternatives for a Low Complexity and Power Constraint Decoder
2013)(
- Contribution to conference › Paper, not in proceeding