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Vertical III-V Nanowire MOSFETs

Kilpi, Olli-Pekka LU (2019)
Abstract
Vertical III-V nanowire MOSFETs are interesting candidates for future digital and analog applications. High electron velocity III-V materials allow fabrication of low power and high frequency MOSFETs. Vertical vapor-liquid-solid growth enables fabrication of axial and radial heterostructure nanowires. This enables fabrication of novel structures where the band-gap can be engineered in the electron transport direction.

In this thesis, vertical InAs/InGaAs DC and RF MOSFETs on Si are fabricated and characterized. Several novel structures in vertical nanowire MOSFETs have been implemented such as gate-last process, axial/radial heterostructures, sub-30-nm gate-length, optimized RF design and field-plate structures. Several different... (More)
Vertical III-V nanowire MOSFETs are interesting candidates for future digital and analog applications. High electron velocity III-V materials allow fabrication of low power and high frequency MOSFETs. Vertical vapor-liquid-solid growth enables fabrication of axial and radial heterostructure nanowires. This enables fabrication of novel structures where the band-gap can be engineered in the electron transport direction.

In this thesis, vertical InAs/InGaAs DC and RF MOSFETs on Si are fabricated and characterized. Several novel structures in vertical nanowire MOSFETs have been implemented such as gate-last process, axial/radial heterostructures, sub-30-nm gate-length, optimized RF design and field-plate structures. Several different nanowire compositions, such as InAs, InAs/In0.7Ga0.3As and InAs/In0.4Ga0.6As, were used. The radial heterostructureand the gate-last process enabled a record low access resistance in these devices. The axial heterostructure, on the other hand, allowed a wider band-gap material on the drain side, therefore suppressing the band-to-band tunnelling and impact ionization. This enabled a considerable improvement in the transistor off-state performance and for the first time Ioff < 1 nA/µm was reported in non-planar In(Ga)As MOSFETs.

This work demonstrated several high performance devices, therefore highlighting the potential of the vertical nanowire MOSFETs. We demonstrate Ion = 407 mA/µm at Ioff = 100 nA/µm and VDD = 0.5 V, which is the highest reported Ion on vertical nanowire MOSFETs. We demonstrated gm = 3.1 mS/µm, which is the highest demonstrated gm on any MOSFET on Si. Further, we increased the breakdown voltage on InAs/InGaAs MOSFETs from 0.5 V to 2.5 V and demonstrated vertical nanowire MOSFETs with fT/ fmax > 100 GHz / 100 GHz. (Less)
Please use this url to cite or link to this publication:
author
supervisor
opponent
  • Professor Takagi, Shinichi, The University of Tokyo, Japan
organization
publishing date
type
Thesis
publication status
published
subject
keywords
Nanowire, MOSFET, III-V, InGaAs, Vertical, Heterostructure, High frequency
pages
90 pages
publisher
Department of Electrical and Information Technology, Lund University
defense location
Lecture Hall E:1406, E-Building, Ole Römers väg 3, Lund University, Faculty of Engineering LTH
defense date
2019-10-11 09:15
ISBN
978-91-7895-292-2
978-91-7895-293-9
language
English
LU publication?
yes
id
00415d54-4258-4913-9a3f-2a8efadd13fe
date added to LUP
2019-09-17 13:37:16
date last changed
2019-09-18 14:04:57
@phdthesis{00415d54-4258-4913-9a3f-2a8efadd13fe,
  abstract     = {Vertical III-V nanowire MOSFETs are interesting candidates for future digital and analog applications. High electron velocity III-V materials allow fabrication of low power and high frequency MOSFETs. Vertical vapor-liquid-solid growth enables fabrication of axial and radial heterostructure nanowires. This enables fabrication of novel structures where the band-gap can be engineered in the electron transport direction.<br/><br/>In this thesis, vertical InAs/InGaAs DC and RF MOSFETs on Si are fabricated and characterized. Several novel structures in vertical nanowire MOSFETs have been implemented such as gate-last process, axial/radial heterostructures, sub-30-nm gate-length, optimized RF design and field-plate structures. Several different nanowire compositions, such as InAs, InAs/In<sub>0.7</sub>Ga<sub>0.3</sub>As and InAs/In<sub>0.4</sub>Ga<sub>0.6</sub>As, were used. The radial heterostructureand the gate-last process enabled a record low access resistance in these devices. The axial heterostructure, on the other hand, allowed a wider band-gap material on the drain side, therefore suppressing the band-to-band tunnelling and impact ionization. This enabled a considerable improvement in the transistor off-state performance and for the first time I<sub>off</sub> &lt; 1 nA/µm was reported in non-planar In(Ga)As MOSFETs.<br/><br/>This work demonstrated several high performance devices, therefore highlighting the potential of the vertical nanowire MOSFETs. We demonstrate I<sub>on</sub> = 407 mA/µm at I<sub>off </sub>= 100 nA/µm and V<sub>DD</sub> = 0.5 V, which is the highest reported I<sub>on</sub> on vertical nanowire MOSFETs. We demonstrated g<sub>m</sub> = 3.1 mS/µm, which is the highest demonstrated g<sub>m</sub> on any MOSFET on Si. Further, we increased the breakdown voltage on InAs/InGaAs MOSFETs from 0.5 V to 2.5 V and demonstrated vertical nanowire MOSFETs with fT/ fmax &gt; 100 GHz / 100 GHz.},
  author       = {Kilpi, Olli-Pekka},
  isbn         = {978-91-7895-292-2 },
  keyword      = {Nanowire,MOSFET,III-V,InGaAs,Vertical,Heterostructure,High frequency},
  language     = {eng},
  pages        = {90},
  publisher    = {Department of Electrical and Information Technology, Lund University},
  school       = {Lund University},
  title        = {Vertical III-V Nanowire MOSFETs},
  year         = {2019},
}