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- 2013
-
Mark
An LC-Based Tunable Low-Isolation Device for Adaptive Duplexers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 0.7 - 3.7 GHz Six Phase Receiver Front-End With Third Order Harmonic Rejection
2013) IEEE European Solid State Circuits Conference, ESSCIRC 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
A receiver architecture for devices in wireless body area networks
2012) In IEEE Journal on Emerging and Selected Topics in Circuits and Systems(
- Contribution to journal › Article
-
Mark
A 65-nm CMOS 250uW Quadrature LO Generation Circuit
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2.45GHz ultra-low power quadrature front-end in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 70 and 210 GHz LO Generator in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2011
-
Mark
A 1.6-2.6GHz 29dBm Injection-Locked Power Amplifier with 64% peak PAE in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design and analysis of an ultra-low-power LC quadrature VCO
(
- Contribution to journal › Article
-
Mark
A PLL based 12 GHz LO generator with digital phase control in 90 nm CMOS
(
- Contribution to journal › Article
-
Mark
A CMOS 4.35-mW+22-dBm IIP3 Continuously Tunable Channel Select Filter for WLAN/WiMAX Receivers
(
- Contribution to journal › Article
-
Mark
A 5GHz 90-nm CMOS all digital phase-locked loop
(
- Contribution to journal › Article
-
Mark
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
60GHz Beamforming Receiver Front-End Measurements
(
- Contribution to journal › Published meeting abstract
-
Mark
Mixed-mode transmitter architectures
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 13dBm 60GHz-band injection locked PA with 36% PAE in 65nm CMOS
2011) APMC 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An Analog (7,5) Convolutional Decoder in 65 nm CMOS for Low Power Wireless Applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A linearized 1.6-5 GHz low noise amplifier using positive feedback in 65 nm CMOS
2011) 29th Norchip conference, 2011(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 65nm CMOS 282uW 915MHz direct conversion receiver front-end
(
- Contribution to conference › Paper, not in proceeding
-
Mark
A 2GHz Tx LO generation circuit with active PPF and 3/2 divider in 65nm CMOS
2011) ISIC 2011 (invited - special session)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 60 GHz receiver front-end with PLL based phase controlled LO generation for phased-arrays
2011) Asia Pacific Microwave Conference(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding