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2019
Mark Vertical III-V Nanowire MOSFETs
Kilpi, Olli-Pekka ^LU (2019) In Series of licentiate and doctoral theses
- Thesis › Doctoral thesis (compilation)
2017
Mark Vertical heterojunction InAs/InGaAs nanowire MOSFETs on Si with I_on = 330 μa/μm at I_off = 100 nA/μm and V_D = 0.5 v
Kilpi, Olli Pekka ^LU ; Wu, Jun ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2017) 37th Symposium on VLSI Technology, VLSI Technology 2017 p.36-37
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
2016
Mark Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
Berg, Martin ^LU ; Kilpi, Olli-Pekka ^LU ; Persson, Karl-Magnus ^LU ; Svensson, Johannes ^LU ; Hellenbrand, Markus ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2016) In IEEE Electron Device Letters 37(8). p.966-969
- Contribution to journal › Letter
Mark Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si
Berg, Martin ^LU ; Persson, Karl-Magnus ^LU ; Kilpi, Olli-Pekka ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2016) 61st IEEE International Electron Devices Meeting, IEDM 2015 2016-February.
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding

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