Data converters & RF-lup-obsolete
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- 2015
-
Mark
A 0.6-3.0 GHz 65 nm CMOS Radio Receiver with DS-based A/D-Converting Channel-Select Filters
2015) IEEE European Solid State Circuits Conference, ESSCIRC 2015(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
Continuous-Time Delta-Sigma Modulators for Ultra-Low-Power Radios
2014)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Continuous-Time Delta-Sigma Modulators for Wireless Communication
2014) In Series of licentiate and doctoral dissertations(
- Thesis › Doctoral thesis (compilation)
- 2013
-
Mark
Theory and Design of a CT Delta Sigma Modulator with Low Sensitivity to Loop-Delay Variations
(
- Contribution to journal › Article
-
Mark
Complex IF Harmonic Rejection Mixer for Non-Contiguous Dual Carrier Reception in 65 nm CMOS
(
- Contribution to journal › Article
-
Mark
A 9MHz Filtering ADC with Additional 2nd-Order Delta-Sigma Modulator Noise Suppression
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 31.25/125MSps Continuous-Time Delta-Sigma ADC with 64/59dB SNDR in 130nm CMOS
2013) NORCHIP Conference, 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
A receiver architecture for devices in wireless body area networks
2012) In IEEE Journal on Emerging and Selected Topics in Circuits and Systems(
- Contribution to journal › Article
-
Mark
A 7.5 mW 9 MHz CT Delta-Sigma Modulator in 65 nm CMOS with 69 dB SNDR and Reduced Sensitivity to Loop Delay Variations
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2011
-
Mark
Time-variant analysis and design of a power efficient ISM-band quadrature receiver
(
- Contribution to journal › Article
-
Mark
A TX VCO for WCDMA/EDGE in 90 nm RF CMOS
(
- Contribution to journal › Article
-
Mark
A 5GHz 90-nm CMOS all digital phase-locked loop
(
- Contribution to journal › Article
-
Mark
A 9-band WCDMA/EDGE transceiver supporting HSPA evolution
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A continuous time delta sigma modulator with reduced clock jitter through DSCR feedback
2011) 29th Norchip conference, 2011(
- Contribution to conference › Paper, not in proceeding
- 2010
-
Mark
Low power multi-band CMOS receiver front-end
2010) PRIME 2010, 6th Conference on Ph.D. Research in Microelectronics & Electronics(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Tionde konferensen om SoC
(
- Contribution to specialist publication or newspaper › Newspaper article
-
Mark
Impact of MOS threshold-voltage mismatch in current-steering DACs for CT delta-sigma modulators
(
- Contribution to conference › Paper, not in proceeding
- 2009
-
Mark
A time-variant analysis of fundamental 1/f3 phase noise in CMOS parallel LC-tank quadrature oscillators
(
- Contribution to journal › Article
-
Mark
DT Modeling of Clock Phase Noise Effects in LP CT Delta-Sigma ADCs with RZ Feedback
(
- Contribution to journal › Article
-
Mark
Design and measurement of a CT delta-sigma ADC with switched-capacitor switched-resistor feedback
(
- Contribution to journal › Article
-
Mark
A compact CMOS MEMS microphone with 66dB SNR
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Swedish system-on-chip conference focuses on meter to nanometer scale electronics R&D
(
- Contribution to specialist publication or newspaper › Newspaper article
-
Mark
A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 5GHz 90-nm CMOS all digital phase-locked loop
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Analysis and design of a low-power single-stage CMOS wireless receiver
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2008
-
Mark
Sensitivity degradation in a tri-band GSM BiCMOS direct-conversion receiver caused by transient substrate heating
(
- Contribution to journal › Article
-
Mark
Analysis and design of a double-quadrature CMOS VCO for subharmonic mixing at Ka-band
(
- Contribution to journal › Article
-
Mark
Comments on "Comments on "A General Theory of Phase Noise in Electrical Oscillators""
(
- Contribution to journal › Letter
-
Mark
CMOS Analog-to-Digital Converters - Analysis, Modeling, and Design
2008)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise
(
- Contribution to journal › Article
-
Mark
A 5.4GHz 90-nm CMOS digitally controlled LC oscillator with 21% tuning range, 1.1MHz resolution, and 180dB FOM
2008) Norchip Conference, 2008(
- Contribution to conference › Paper, not in proceeding
-
Mark
A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz
2008) p.474-629(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding