Jiren Yuan (Former)
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- 2013
-
Mark
RF Spatial Modulation Using Antenna Arrays
(
- Contribution to journal › Article
- 2007
-
Mark
A 10-bit 500-MS/s 124-mW subranging folding ADC in 0.13 μm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 10-bit pipeline ADC using 40-dB opamps and calibrated customized references
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A low complexity DDS IC for FM-UWB applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A digital-baseband mixed-signal chip for ultra wide band applications
2007) Swedish System-on-Chip Conference 2007 (SSoCC’07)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Calibration technique for op-amp finite gain in pipelined ADC
2007) Swedish System-on-Chip Conference 2007 (SSoCC’07)(
- Contribution to conference › Paper, not in proceeding
- 2006
-
Mark
A low-power 8-bit folding A/D converter with improved accuracy
2006) 2006 8th International Conference on Solid-State and Integrated Circuit Technology(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Accuracy improving technique in folding A/D converter with calibrated folder
2006) SSoCC (Swedish System-on-Chip Conference), 2006(
- Contribution to conference › Paper, not in proceeding
- 2005
-
Mark
Performance analysis of general charge sampling
(
- Contribution to journal › Article
-
Mark
Accurate sample-and-hold circuit model
(
- Contribution to journal › Article
-
Mark
A Reconfigurable Pipelined ADC in 0.18 um CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design considerations of a floating-point ADC with embedded S/H
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1 GHz CMOS current-folded direct digital RF quadrature modulator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Silent CMOS circuits aiming for system-on-chip
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Studies of time error limitations in ADC systems with random parallel passive sampling
2005) Swedish System-on-Chip Conference (SSoCC'05)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
A single-stage direct interpolation multiphase clock generator with phase error averaging
(
- Contribution to journal › Article
-
Mark
A CMOS 500 MS/S charge sampler
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A novel reconfigurable pipelined A/D conversion technique for multistandard wideband receivers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A simulation model for embedding the transistor bias
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A programmable analog-to-digital converter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Low power very fast dynamic logic circuits
2004) p.1-19(
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
An accurate circuit model for a general sample-and-hold circuit
2004) 2004 IEEJ (7th) International Analog VLSI Workshop (AVLSIWS 2004)(
- Contribution to conference › Paper, not in proceeding
-
Mark
A CMOS charge sampler with amplification function
2004) Swedish System-on-Chip Conference 2004 (SSoCC’04)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Distortion in pipelined analog-to-digital converters
2004) 2004 IEEJ (7th) International Analog VLSI Workshop (AVLSIWS 2004)(
- Contribution to conference › Paper, not in proceeding
- 2003
-
Mark
A differential difference comparator for multi-step A/D converters
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 10-bit wide-band CMOS direct digital RF amplitude modulator
(
- Contribution to journal › Article
-
Mark
Charge sampling analogue FIR filter
(
- Contribution to journal › Article
-
Mark
A 8-bit 100-MHz CMOS linear interpolation DAC
(
- Contribution to journal › Article
-
Mark
A highly integrated CMOS direct digital RF quadrature modulator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Performance analysis of general charge sampling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 80 dB second order - modulator
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A silent CMOS circuit technique
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
On the effects of static errors in a pipelined A/D converter
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2002
-
Mark
A direct digital RF amplitude modulator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A non-feedback multiphase clock generator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A low distortion wide band CMOS direct digital RF amplitude modulator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A non-feedback multiphase clock generator using direct interpolation
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A CMOS analog FIR filter with low phase distortion
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 10-bit, 100-MHz CMOS linear interpolation DAC
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A single-stage direct interpolation multiphase clock generator with phase error average
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2001
-
Mark
A low-voltage high-speed sampling technique
2001) p.228-231(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Realization of a floating-point A/D converter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An 8-Bit, 100-MHz low glitch interpolation DAC
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An embedded low power FIR filter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
An 8-bit, 100 MHz low glitch interpolation DAC
2000) p.315-319(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysis and implementation of a semi-integrated Buck converter with static feedback control
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Single input current-sensing differential logic (SCSDL)
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Comparison of charge sampling and voltage sampling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Accurate sampling of radio signals beyond gigahertz in CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A charge sampling mixer with embedded filter function for wireless applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A sampler with embedded filter function
2000) p.128-133(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
Multigigahertz TSPC circuits in deep submicron CMOS
(
- Contribution to journal › Article
- 1997
-
Mark
New single clock CMOS latches and flipflops with improved speed and power savings
(
- Contribution to journal › Article
- 1995
-
Mark
FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry
1995) In Nuclear Instruments & Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors, and Associated Equipment 357(2-3). p.306-317(
- Contribution to journal › Article
- 1994
-
Mark
A 10-bit 5-MS/s successive approximation ADC cell used in a 70-MS/s ADC array in 1.2-um CMOS
(
- Contribution to journal › Article
-
Mark
A 3-level asynchronous protocol for a differential two-wire communication link
(
- Contribution to journal › Article
-
Mark
Ultimate CMOS speed and device sizing
1994)(
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
High speed circuit techniques for pipelining and for one clock-cycle decision
1994)(
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
High speed CMOS subsystems
1994)(
- Chapter in Book/Report/Conference proceeding › Book chapter
- 1993
-
Mark
New domino logic precharged by clock and data
(
- Contribution to journal › Article
-
Mark
Fast CMOS nonbinary divider and counter
(
- Contribution to journal › Article
-
Mark
A 700-MHZ 24-bit pipelined accumulator in 1.2-um CMOS for application as a numerically controlled oscillator
(
- Contribution to journal › Article
-
Mark
Novel carry propagation in high-speed synchronous counters and dividers
(
- Contribution to journal › Article
- 1991
-
Mark
Pushing the limits of standard CMOS
(
- Contribution to journal › Article
-
Mark
Double-edge-triggered D-flip-flop for high speed CMOS circuits
(
- Contribution to journal › Article
- 1989
-
Mark
High speed CMOS circuit technique
(
- Contribution to journal › Article
- 1988
-
Mark
CMOS circuit speed optimization based on switch level simulation
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A CMOS implementation of a video-rate successive approximation A/D converter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Efficient CMOS counter circuits
(
- Contribution to journal › Article
-
Mark
Bit-serial realization of maximum and minimum filters
(
- Contribution to journal › Article
-
Mark
A phase-shifting PLL frequency offseter
(
- Contribution to journal › Article
-
Mark
100-400 Mhz digital and analog technique in 3 um CMOS process
1988) NORSILC/NORCHIP conference(
- Contribution to conference › Paper, not in proceeding
- 1987
-
Mark
A true single-phase-clock dynamic CMOS circuit technique
(
- Contribution to journal › Letter
-
Mark
A digital frequency multiplier using VLSI technology
1987) Radio Scientific Conference '87(
- Contribution to conference › Paper, not in proceeding