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- 2019
-
Mark
Efficient Hardware Implementations of Grain-128AEAD
2019) 20th International Conference on Cryptology in India, INDOCRYPT 2019 In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 11898 LNCS. p.495-513(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2015
-
Mark
A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems
(
- Contribution to journal › Article
- 2014
-
Mark
Hardware Implementation of the Exponential Function Using Taylor Series
2014) 32nd NORCHIP Conference, 2014(
- Contribution to conference › Paper, not in proceeding
-
Mark
Lessons from Ten Years of the International Master’s Program in System-on-Chip
2014) The 10th European Workshop on Microelectronics Education (EWME 2014)(
- Contribution to conference › Paper, not in proceeding
- 2013
-
Mark
Power Savings in Digital Filters for Wireless Communication
2013) European Conference on Circuit Theory and Design (ECCTD 2013)(
- Contribution to conference › Paper, not in proceeding
- 2012
-
Mark
The PreAmplifier ShAper for the ALICE TPC detector
2012) In Nuclear Instruments & Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors, and Associated Equipment 676. p.106-119(
- Contribution to journal › Article
-
Mark
A unified multi-mode MIMO detector with soft-output
2012) IEEE International Symposium on Circuits and Systems (ISCAS), 2012(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Hardware Architectures for Wireless Communication - Symbol Detection and Channel Estimation
2012)(
- Thesis › Doctoral thesis (compilation)
- 2008
-
Mark
Design of Reconfigurable Hardware Architectures for Real-time Applications
(
- Thesis › Doctoral thesis (compilation)
- 2007
-
Mark
Trellis Decoding: From Algorithm to Flexible Architectures
2007) In Series of licentiate and doctoral theses(
- Thesis › Doctoral thesis (monograph)
- 2006
-
Mark
A VLSI architecture of the square root algorithm for V-BLAST detection
(
- Contribution to journal › Article
-
Mark
Model Based Engine Control Using ASICs: A Virtual Heat Release Sensor
2006)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
FPGA Based Engine Feedback Control Algorithms
2006)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2005
-
Mark
MIMO Decoding Algorithm and Implementation
2005) In Series of licentiate and doctoral theses / Department of Applied Electronics, Lund University 57.(
- Thesis › Doctoral thesis (monograph)
-
Mark
A manual on ASIC front to back end design flow
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Development and Implementation of Cardiac Event Detectors in Digital CMOS
2005)(
- Thesis › Doctoral thesis (compilation)
-
Mark
A dual-mode wavelet based R-wave detector using single-Vt for leakage reduction [cardiac pacemaker applications]
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Fixed-point implementation of a robust complex valued divider architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
A flexible wavelet filter structure for cardiac pacemakers: a power efficient implementation
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2001
-
Mark
Linear Transmitter Design Using Nonlinear Analog Circuits
2001)(
- Thesis › Doctoral thesis (compilation)
- 1999
-
Mark
Delta++ Resonance Measurements in a High Multiplicity Environment
1999)(
- Thesis › Doctoral thesis (compilation)