Digital ASIC-lup-obsolete
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- 2008
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Mark
Design of Reconfigurable Hardware Architectures for Real-time Applications
(
- Thesis › Doctoral thesis (compilation)
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Mark
A generic hardware MAC for wireless personal area network platforms
2008) International Symposium on Wireless Personal Multimedia Communications (WPMC), 2008(
- Contribution to conference › Paper, not in proceeding
-
Mark
On MIMO OFDM channel estimation architecture considerations
2008) Swedish System-on-Chip Conference 2008 (SSoCC’08)(
- Contribution to conference › Paper, not in proceeding
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Mark
Modelling and exploration of a reconfigurable array using SystemC TLM
(
- Contribution to conference › Paper, not in proceeding
- 2007
-
Mark
Protocol Requirements in an SJTAG/IJTAG Environment
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Extended STAPL as SJTAG Engine
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
2007) p.221-244(
- Chapter in Book/Report/Conference proceeding › Book chapter
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Mark
Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Protocol Requirements in an SJTAG/IJTAG Environment
2007) Nordic Test Forum NTF,2007(
- Contribution to conference › Paper, not in proceeding