Integrated Electronic Systems
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- 2017
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Mark
Architecture Design of a Memory Subsystem for Massive MIMO Baseband Processing
(
- Contribution to journal › Article
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Mark
Two Tunable Frequency Duplexer Architectures for Cellular Transceivers
2017) In IEEE Transactions on Circuits and Systems I: Regular Papers(
- Contribution to journal › Article
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Mark
Ultra-low Power Design Approaches in Memories and Assist Techniques
2017)(
- Thesis › Doctoral thesis (compilation)
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Mark
BASTION: Board and SoC test instrumentation for ageing and no failure found
2017) In Proceedings (Design, Automation, and Test in Europe Conference and Exhibition. Online) p.115-120(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Fault Extraction in Self-Reconfiguring IEEE 1687 Networks
2017) 2nd Test Standards Application Workshop(
- Contribution to conference › Paper, not in proceeding
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Mark
Reducing Pessimism in Upper-Bound Computation for Optimal IEEE 1687 Retargeting
2017) 2nd Test Standards Application Workshop(
- Contribution to conference › Paper, not in proceeding
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Mark
Performance Characterization of a Real-Time Massive MIMO System with LOS Mobile Channels
(
- Contribution to journal › Article
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Mark
Two mm-Wave VCOs in 28-nm UTBB FD-SOI CMOS
(
- Contribution to journal › Letter
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Mark
Hardware Implementation of Baseband Processing for Massive MIMO
2017)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Logic filter cache for wide-VDD-range processors
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding