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- 2021
-
Mark
High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon
(
- Contribution to journal › Article
- 2016
-
Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter
- 2014
-
Mark
Nanowire Transistors and RF Circuits for Low-Power Applications
2014)(
- Thesis › Doctoral thesis (compilation)
-
Mark
InAs nanowire MOSFET differential active mixer on Si-substrate
(
- Contribution to journal › Article
- 2013
-
Mark
1/f-noise in Vertical InAs Nanowire Transistors
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Surface and core contribution to 1/f-noise in InAs nanowire metal-oxide-semiconductor field-effect transistors
(
- Contribution to journal › Article
- 2012
-
Mark
Vertical InAs nanowire MOSFETs with IDS = 1.34 mA/µm and gm = 1.19 mS/µm at VDS = 0.5 V
(
- Contribution to journal › Published meeting abstract