Saketh Ram Mamidala (Former)

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2025
Mark Interface Characterization of Plasma-Treated InAs Electrodes for Resistive Random-Access Memories Using Capacitance–Voltage Methods
Andersen, André ^LU ; Mamidala, Saketh Ram ^LU and Wernersson, Lars Erik ^LU (2025) In Physica Status Solidi (A) Applications and Materials Science
- Contribution to journal › Article
2024
Mark Cryogenic Evaluation of Resistive Random Access Memory With Enhanced Endurance at 14 K
Mamidala, Saketh Ram ^LU ; Mamidala, Karthik Ram ^LU and Wernersson, Lars-Erik ^LU (2024) In IEEE Transactions on Electron Devices
- Contribution to journal › Article
2023
Mark Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
Rangasamy, Gautham ^LU ; Ram, Mamidala Saketh ^LU ; Fhager, Lars Ohlsson ^LU and Wernersson, Lars Erik ^LU (2023) In IEEE Electron Device Letters 44(7). p.1212-1215
- Contribution to journal › Article
Mark Vertical III-V Nanowires For In-Memory Computing
Mamidala, Saketh Ram ^LU (2023)
- Thesis › Doctoral thesis (compilation)
Mark Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors
Mamidala, Saketh Ram ^LU ; Svensson, Johannes ^LU and Wernersson, Lars-Erik ^LU (2023) In ACS Applied Materials and Interfaces 15(15).
- Contribution to journal › Article
2022
Mark Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
Mamidala, Saketh, Ram ^LU ; Svensson, Johannes ^LU ; Skog, Sebastian ; Johannesson, Sofie and Wernersson, Lars-Erik ^LU (2022) In IEEE Electron Device Letters 43(12). p.2033-2033
- Contribution to journal › Article
Mark The Effect of Deposition Conditions on Heterointerface-Driven Band Alignment and Resistive Switching Properties
Yong, Zhihua ^LU ; Mamidala, Saketh, Ram ^LU ; Persson, Karl-Magnus ^LU ; Subramanian, Gomathy Sandhya ; Wernersson, Lars-Erik ^LU and Pan, Jisheng (2022) In Advanced Electronic Materials 8(11).
- Contribution to journal › Article
Mark A 4F² Vertical Gate-all-around Nanowire Compute-in-memory Device Integrated in (1T1R) Cross-Point Arrays on Silicon
Mamidala, Saketh, Ram ^LU ; Persson, Karl-Magnus ^LU and Wernersson, Lars-Erik ^LU (2022) 2022 IEEE Silicon Nanoelectronics Workshop (SNW) p.1-2
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages
Andric, Stefan ^LU ; Kilpi, Olli-Pekka ^LU ; Mamidala, Saketh, Ram ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2022) In IEEE Transactions on Electron Devices 69(6). p.3055-3055
- Contribution to journal › Article
2021
Mark Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
Kilpi, Olli Pekka ^LU ; Andric, Stefan ^LU ; Svensson, Johannes ^LU ; Ram, Mamidala Saketh ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2021) In IEEE Electron Device Letters 42(11). p.1596-1598
- Contribution to journal › Article

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