11 – 19 of 19
- show: 10
- |
- sort: year (new to old)
Close
Embed this list
<iframe src=" "
width=" "
height=" "
allowtransparency="true"
frameborder="0">
</iframe>
- « previous
- 1
- 2
- next »
- 2013
-
Mark
Wideband SAW-Less Receiver Front-End with Harmonic Rejection Mixer in 65-nm CMOS
(
- Contribution to journal › Article
- 2012
-
Mark
Ultra Low Power Error Correction Circuits- Technology Scaling and Sub-Vt operation
(
- Contribution to journal › Article
-
Mark
Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator
(
- Contribution to journal › Article
- 2010
-
Mark
A 1.1-Gb/s 115-pJ/bit configurable MIMO detector using 0.13-um CMOS technology
(
- Contribution to journal › Article
- 2009
-
Mark
DT Modeling of Clock Phase Noise Effects in LP CT Delta-Sigma ADCs with RZ Feedback
(
- Contribution to journal › Article
- 2007
-
Mark
Survivor path processing in Viterbi decoders using register exchange and traceforward
(
- Contribution to journal › Article
-
Mark
Measured CMOS Switched High-Quality Capacitors in a Reconfigurable Matching Network
(
- Contribution to journal › Article
- 2006
-
Mark
On the Implementation of the Linearly Constrained Minimum Variance Beamformer
(
- Contribution to journal › Article
- 2005
-
Mark
Performance analysis of general charge sampling
(
- Contribution to journal › Article
- « previous
- 1
- 2
- next »