Jörn Janneck (Former)
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- 2023
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Mark
Informing Static Mapping and Local Scheduling of Stream Programs with Trace Analysis
2023) 25th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing, SYNASC 2023 p.98-103(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2022
-
Mark
Auto-Partitioning Heterogeneous Task-Parallel Programs with StreamBlocks
2022) 31st International Conference on Parallel Architectures and Compilation Techniques, PACT 2022 p.398-411(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysing Dataflow Programs with Causation Traces
2022) 31st International Conference on Parallel Architectures and Compilation Techniques, PACT 2022 p.534-535(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2021
-
Mark
Generating hardware and software for RISC-V cores generated with Rocket Chip generator
2021) 34th IEEE International System-on-Chip Conference, SOCC 2021 In International System on Chip Conference 2021-September. p.89-94(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2020
-
Mark
Crystal centering using deep learning in X-ray crystallography
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2019
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Mark
Tÿcho : A framework for compiling stream programs
(
- Contribution to journal › Article
- 2018
-
Mark
MPEG reconfigurable video coding
2018) p.213-249(
- Chapter in Book/Report/Conference proceeding › Book chapter
- 2017
-
Mark
Trace-based manycore partitioning of stream-processing applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
High-level system synthesis and optimization of dataflow programs for MPSoCs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Aegis : Reliable Application Execution over the Mobile Cloud
(
- Contribution to journal › Article
- 2016
-
Mark
Clock-gating of streaming applications for energy efficient implementations on FPGAs
(
- Contribution to journal › Article
-
Mark
High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms
2016) International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVI) p.227-234(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Processes and actors: Translating Kahn processes to dataflow with firing
2016) International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVI) p.21-30(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Content-based caching in a managed runtime computing environment
2016) 9,411,744(
- Patent › Patent
-
Mark
Implementing a streaming application on a processor array : A case study on the Epiphany architecture
2016) 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 2016-February. p.177-181(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques : Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies
(
- Contribution to journal › Article
- 2015
-
Mark
Method of generating data for estimating resource requirements for a circuit design
2015) US9117046 (B1)(
- Patent › Patent
- 2014
-
Mark
Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Realizing Efficient Execution of Dataflow Actors on Manycores
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Dataflow machines
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Turnus: An open-source design space exploration framework for dynamic stream programs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Characterizing communication behavior of dataflow programs using trace analysis
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Finding fast action selectors for dataflow actors
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Coarse grain clock gating of streaming applications in programmable logic implementations
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Software code generation for dynamic dataflow programs
2014) SCOPES '14 Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems p.31-39(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Mapping and Scheduling of Dataflow Graphs - A Systematic Map
2014) 48th Asilomar Conference on Signals, Systems and Computers, 2014(
- Contribution to conference › Paper, not in proceeding
- 2013
-
Mark
Synthesis and optimization of high-level stream programs
2013) The 2013 Electronic System Level Synthesis Conference(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Methods to explore design space for MPEG RVC codec specifications
(
- Contribution to journal › Article
-
Mark
Actor Classification using Actor Machines
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Representing Guard Dependencies in Dataflow Execution Traces
2013) Fifth International Conference on Computational Intelligence, Communication Systems, and Networks (CICSyN) p.291-295(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
MPEG Reconfigurable Video Coding
2013) p.281-314(
- Chapter in Book/Report/Conference proceeding › Book chapter
-
Mark
Buffer Optimization Based on Critical Path Analysis of a Dataflow Program Design
2013) IEEE International Symposium on Circuits and Systems (ISCAS), 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design space exploration and implementation of RVC-CAL applications using the TURNUS framework
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
TURNUS: a Design Exploration Framework for Dataflow System Design
2013) IEEE International Symposium on Circuits and Systems (ISCAS), 2013(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Systems Design Space Exploration by Serial Dataflow Program Executions
2013) 47th Annual Asilomar Conference on Signals, Systems, and Computers, 2003(
- Contribution to conference › Paper, not in proceeding
-
Mark
Automatic queue sizing for dataflow applications
2013) US 8,595,391(
- Patent › Patent
-
Mark
High-level Synthesis of Dataflow Programs for Signal Processing Systems
2013) 8th International Symposium on Image and Signal Processing and Analysis (ISPA 2013)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Design Space Exploration of High-Level Stream Programs on Parallel Architectures
2013) 8th International Symposium on Image and Signal Processing and Analysis (ISPA 2013)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Method and apparatus for supporting run-time reconfiguration in a programmable logic integrated circuit
2013) U.S. Patent 8,402,409(
- Patent › Patent
-
Mark
Asynchronous communication network and methods of enabling the asynchronous communication of data in an integrated circuit
2013) U.S. Patent 8,402,164(
- Patent › Patent
-
Mark
Multi-Clock-Domain Optimization for Reconfigurable Architectures in High-Level Dataflow Applications
2013) 47th Annual Asilomar Conference on Signals, Systems, and Computers, 2003(
- Contribution to conference › Paper, not in proceeding
-
Mark
Method and apparatus for processing an event notification in a concurrent processing system
2013) US 8,572,432(
- Patent › Patent
-
Mark
Partitioning and Optimization of High-Level Stream Applications for Multi-Clock-Domain Architectures
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
Toward Efficient Execution of Dataflow Actors
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Partitioning and Mapping Dynamic Dataflow Programs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Sphere detector performing depth-first search until terminated
2012) U.S. Patent 8,311,161(
- Patent › Patent
-
Mark
Cross-layer allocation of spectral resource to spatially multiplexed communication
2012) U.S. Patent 8,155,071(
- Patent › Patent
- 2011
-
Mark
A machine model for dataflow actors and its applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding