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- 2012
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Mark
Ultra Low Power Error Correction Circuits- Technology Scaling and Sub-Vt operation
(
- Contribution to journal › Article
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Mark
High-level energy estimation in the sub-VT domain: simulation and measurement of a cardiac event detector
(
- Contribution to journal › Article
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Mark
IR-Drop Reduction in Sub-VT Circuits by De-synchronization
2012) IEEE Subthreshold Microelectronics Conference, IEEE-Sub-Vt 2012(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A High Efficiency 60GHz Power Amplifier in 65nm CMOS
(
- Contribution to journal › Published meeting abstract
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Mark
High Power and High Performance RF SOS FET Switches
(
- Contribution to journal › Published meeting abstract
- 2011
-
Mark
Design and analysis of an ultra-low-power LC quadrature VCO
(
- Contribution to journal › Article
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Mark
A 1.6-2.6GHz 29dBm Injection-Locked Power Amplifier with 64% peak PAE in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A PLL based 12 GHz LO generator with digital phase control in 90 nm CMOS
(
- Contribution to journal › Article
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Mark
Highly Scalable Implementation of a Robust MMSE Channel Estimator for OFDM Multi-Standard Environment
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding