Pietro Andreani
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- 2014
-
Mark
A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
(
- Contribution to journal › Article
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Mark
A Filtering Delta Sigma ADC for LTE and Beyond
(
- Contribution to journal › Article
-
Mark
A 2.4-to-5.3GHz Dual-Core CMOS VCO with Concentric 8-Shaped Coils
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An 11mW Continuous Time Delta-Sigma Modulator with 20 MHz Bandwidth in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Class-D CMOS DCO with an on-chip LDO
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Lessons from Ten Years of the International Master’s Program in System-on-Chip
2014) The 10th European Workshop on Microelectronics Education (EWME 2014)(
- Contribution to conference › Paper, not in proceeding
- 2013
-
Mark
A Push-Pull Class-C CMOS VCO
(
- Contribution to journal › Article
-
Mark
Theory and Design of a CT Delta Sigma Modulator with Low Sensitivity to Loop-Delay Variations
(
- Contribution to journal › Article
-
Mark
A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
(
- Contribution to journal › Article