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- 2022
-
Mark
Surface modification of III-V nanostructures studied by low-temperature scanning tunneling microscopy
(2022)
- Thesis › Doctoral thesis (compilation)
-
Mark
InGaAs Nanowire and Quantum Well Devices
(2022)
- Thesis › Doctoral thesis (compilation)
- 2021
-
Mark
Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
(2021)
- Thesis › Doctoral thesis (compilation)
-
Mark
III-V Nanowire MOSFET High-Frequency Technology Platform
(2021)
- Thesis › Doctoral thesis (compilation)
-
Mark
Kinetic and Thermodynamic Modeling of Nanowire Growth
(2021)
- Thesis › Doctoral thesis (compilation)
-
Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
Jönsson, Adam LU ; Svensson, Johannes LU ; Fiordaliso, Elisabetta Maria ; Lind, Erik LU
; Hellenbrand, Markus
LU
and Wernersson, Lars Erik
LU
(2021)
In ACS Applied Electronic Materials
3(12).
p.5240-5247
- Contribution to journal › Article
-
Mark
High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon
Mamidala, Saketh, Ram LU
; Persson, Karl-Magnus
LU
; Irish, Austin
LU
; Jönsson, Adam
LU
; Timm, Rainer
LU
and Wernersson, Lars-Erik
LU
(2021)
In Nature Electronics
p.914-914
- Contribution to journal › Article
- 2020
-
Mark
Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs
Hellenbrand, Markus LU ; Lind, Erik LU
; Kilpi, Olli-Pekka
LU
and Wernersson, Lars-Erik
LU
(2020)
In Solid-State Electronics
171.
- Contribution to journal › Article
-
Mark
Electrical Characterisation of III-V Nanowire MOSFETs
(2020) In Series of Licentiate and Doctoral Theses
- Thesis › Doctoral thesis (compilation)
- 2019
-
Mark
Vertical III-V Nanowire MOSFETs
(2019) In Series of licentiate and doctoral theses
- Thesis › Doctoral thesis (compilation)