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- 2004
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Mark
Reduced complexity Schnorr-Euchner decoding algorithms for MIMO systems
(
- Contribution to journal › Article
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Mark
A simplified computational kernel for trellis-based decoding
(
- Contribution to journal › Article
-
Mark
VLSI implementation issues of lattice decoders for MIMO systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Survey of Various Discrete Transforms Used in Digital Image Compression Algorithms
2004) Swedish System-on-Chip Conference 2004 (SSoCC’04)(
- Contribution to conference › Paper, not in proceeding
-
Mark
A V-BLAST Detector Based on Square Root Algorithm
2004) Swedish System-on-Chip Conference 2004 (SSoCC’04)(
- Contribution to conference › Paper, not in proceeding
-
Mark
On VLSI Implementations of MIMO Detectors for Future Wireless Communications
2004) IST-MAGNET Workshop(
- Contribution to conference › Paper, not in proceeding
-
Mark
Bidirectional FFT Processor for OFDM
2004) Swedish System-on-Chip Conference 2004 (SSoCC’04)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An ASIC Implementation for V-BLAST Detection in 0.35um CMOS
2004) Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT p.95-98(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2003
-
Mark
A digitally controlled PLL for digital SOCs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Providing flexibility in a convolutional encoder
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A VLSI implementation of MIMO detection for future wireless communications
2003) 14th IEEE 2003 International Symposium on Personal, Indoor and Mobile Radio Communications. Proceedings p.2852-2856(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Flexible baseband transmitter for OFDM
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Portable digital clock generator for digital signal processing applications
(
- Contribution to journal › Article
-
Mark
Teaching digital HW-design by implementing a complete MP3 decoder
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Event driven design methodology for hardware DSP design
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A low-complexity VLSI architecture for square root MIMO detection
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Hardware Architecture for Power Efficient and Portable UMTS Turbo Decoder
2003) WWC, San Francisco, California, USA(
- Contribution to conference › Paper, not in proceeding
-
Mark
Low power radio transmitter
2003) GigaHertz 2003, the Seventh Symposium(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
On VLSI Implementation of Square Root Algorithm for MIMO Detection
2003) Swedish System-on-Chip Conference 2003 (SSoCC'03)(
- Contribution to conference › Paper, not in proceeding
-
Mark
A Generic Transmitter for Wireless OFDM Systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2002
-
Mark
A PLL Clock Multiplier Made from Digital Standard Cells
2002) Nordic Radio Science and Communication Conference 2002(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An all-digital PLL clock multiplier
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A new System-on-Chip Curriculum at Lund University
2002) European Workshop on Microelectronics Education (EWME)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Flexible FFT Processor
2002) Norchip Conference, 2002(
- Contribution to conference › Paper, not in proceeding
-
Mark
On Detection Algorithms and Hardware Implementations for V-BLAST
2002) Swedish System-on-Chip Conference 2002 (SSoCC 02)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Implementation Aspects of High Throughput Iterative Decoders
2002) Swedish System-on-Chip Conference 2002 (SSoCC 02)(
- Contribution to conference › Paper, not in proceeding
- 2001
-
Mark
A 2GHz merged CMOS LNA and mixer for WCDMA
2001) p.19-22(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Socware: A New Swedish Design Cluster for System-on-Chip
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A filtering technique to lower LC oscillator phase noise
(
- Contribution to journal › Article
-
Mark
A fully Integrated Standard-Cell Digital PLL
(
- Contribution to journal › Article
-
Mark
A filtering technique to lower oscillator phase noise
2001) p.364-365(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design patterns for hardware datapath library design
2001) Swedish System-on-Chip Conference 2001 (SSoCC 01)(
- Contribution to conference › Paper, not in proceeding
-
Mark
A Digital PLL Made from Standard Cells
2001) 11:th European Conference on Circuit Design (ECCTD’01)(
- Contribution to conference › Paper, not in proceeding
-
Mark
Application of Software Design Patterns to DSP Library Design
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Dual Supply-Voltage Scaling for Reconfigurable SoCs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2000
-
Mark
Theory and use of chaotic oscillators in electronic communication systems
2000)(
- Thesis › Licentiate thesis
-
Mark
A Digitally Controlled Low-Power Clock Multiplier for Globally Asynchronous Locally Synchronous Designs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An OFDM Timing Synchronization ASIC
2000) 7th IEEE International Conference on Electronics, Circuits and Systems (ICECS’2K) 1. p.324-327(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 1999
-
Mark
Power Reduction in Custom CMOS Digital Filter Structures
(
- Contribution to journal › Article
-
Mark
Wordlength Optimization of a Pipelined FFT Processor
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Hardware implementation of an OFDM synchronizer
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Digitally Controlled On-Chip Clock Multiplier for Globally Asynchronous Locally Synchronous Systems
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An inductorless 300MHz wideband CMOS power amplifier
(
- Contribution to journal › Article
-
Mark
Silicon realization of an OFDM synchronization algorithm
1999) IEEE 6th International Conference on Electronics, Circuits and Systems (ICECS’99) 1. p.319-322(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Implementation of an OFDM Synchronization Algorithm
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Highly linear integrated wideband amplifiers: design and analysis techniques for frequencies from audio to RF
1999)(
- Book/Report › Book
-
Mark
Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Globally Asynchronous Locally Synchronous Architecture for Large High-performance ASICs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
High bandwidth iterative decoding in a fading environment
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Design of a High Throughput Serial Concatenated Convolution Decoder
1999) NORCHIP Conference, 1999(
- Contribution to conference › Paper, not in proceeding