31 – 40 of 83
- show: 10
- |
- sort: year (new to old)
Close
Embed this list
<iframe src=""
width=""
height=""
allowtransparency="true"
frameborder="0">
</iframe>
- 2013
-
Mark
Dual-VT 4kb Sub-VT Memories with <1 pW/bit Leakage in 65 nm CMOS
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Ultra Low Energy Design Exploration of Digital Decimation Filters in 65 nm Dual-VT CMOS in the Sub-VT Domain
- Contribution to journal › Article
-
Mark
A 65-nm CMOS Area Optimized De-synchronization Flow for sub-V-T Designs
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Next Generation Digital Front-End for Multi-Standard Concurrent Reception
(2013) NORCHIP Conference, 2013
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Approximative Matrix Inverse Computations for Very-large MIMO and Applications to Linear Pre-coding Systems
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Two Flavors of 4kb Standard-Cell Based Subvt Memory in 65 nm CMOS
(2013) Swedish System-On-Chip Conference (SSoCC), 2013
- Contribution to conference › Paper, not in proceeding
-
Mark
An Ultra-Low-Power Application-Specific Processor for Compressed Sensing
- Chapter in Book/Report/Conference proceeding › Book chapter
- 2012
-
Mark
Ultra Low Power Error Correction Circuits- Technology Scaling and Sub-Vt operation
- Contribution to journal › Article
-
Mark
High-level energy estimation in the sub-VT domain: simulation and measurement of a cardiac event detector
- Contribution to journal › Article
-
Mark
A receiver architecture for devices in wireless body area networks
(2012) In IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- Contribution to journal › Article
