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- 2014
-
Mark
Error study on the normal conducting ESS linac
(
- Contribution to conference › Paper, not in proceeding
-
Mark
Statistical error studies in the ESS linac
(
- Contribution to conference › Paper, not in proceeding
- 2013
-
Mark
Extrinsic and Intrinsic Performance of Vertical InAs Nanowire MOSFETs on Si Substrates
(
- Contribution to journal › Article
-
Mark
A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback
(
- Contribution to journal › Article
-
Mark
RF reliability of gate last InGaAs nMOSFETs with high-k dielectric
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2011
-
Mark
Design and analysis of an ultra-low-power LC quadrature VCO
(
- Contribution to journal › Article
-
Mark
RF Characterization of Vertical InAs Nanowire Wrap-Gate Transistors Integrated on Si Substrates
(
- Contribution to journal › Article
-
Mark
A 5GHz 90-nm CMOS all digital phase-locked loop
(
- Contribution to journal › Article
- 2010
-
Mark
A technique for improving gain and noise figure of common-gate wideband LNAs
(
- Contribution to journal › Article
-
Mark
A 90-nm CMOS +11dBm IIP3 4mW dual-band LNA for cellular handsets
(
- Contribution to journal › Letter