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- 2021
-
Mark
Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
2021)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Capacitance Scaling in In0.71Ga0.29As/InP MOSFETs with Self-Aligned a:Si Spacers
(
- Contribution to journal › Article
-
Mark
Design of III-V Vertical Nanowire MOSFETs for Near-Unilateral Millimeter-Wave Operation
2021) 15th European Microwave Integrated Circuits Conference, EuMIC 2020 In EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference p.85-88(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
(
- Contribution to journal › Article
-
Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
(
- Contribution to journal › Article
- 2020
-
Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
(
- Contribution to journal › Article
-
Mark
Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs
(
- Contribution to journal › Article
-
Mark
Electrical Characterisation of III-V Nanowire MOSFETs
2020) In Series of Licentiate and Doctoral Theses(
- Thesis › Doctoral thesis (compilation)
- 2019
-
Mark
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
(
- Contribution to journal › Article
-
Mark
Vertical III-V Nanowire MOSFETs
2019) In Series of licentiate and doctoral theses(
- Thesis › Doctoral thesis (compilation)