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- 2019
-
Mark
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
(
- Contribution to journal › Article
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Mark
Vertical III-V Nanowire MOSFETs
2019) In Series of licentiate and doctoral theses(
- Thesis › Doctoral thesis (compilation)
-
Mark
Low-complexity III-V circuitry for millimeter wave communication and radar
2019) 2019 IEEE Globecom Workshops, GC Wkshps 2019 In 2019 IEEE Globecom Workshops, GC Wkshps 2019 - Proceedings(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
A Self-aligned Gate-last Process applied to All-III-V CMOS on Si
(
- Contribution to journal › Article
-
Mark
A Method for Determining Trap Distributions of Specific Channel Surfaces in InGaAs Tri-gate MOSFETs
(
- Contribution to journal › Article
- 2017
-
Mark
Gated Hall effect measurements on selectively grown InGaAs nanowires
(
- Contribution to journal › Article
-
Mark
III-V MOSFETs for High-Frequency and Digital Applications
2017)(
- Thesis › Doctoral thesis (compilation)
-
Mark
Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs
2017) In IEEE Electron Device Letters(
- Contribution to journal › Letter
-
Mark
Vertical III-V Nanowire Tunnel Field-Effect Transistor
2017)(
- Thesis › Doctoral thesis (compilation)
- 2016
-
Mark
Ballistic modeling of InAs nanowire transistors
(
- Contribution to journal › Article