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- 2023
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Mark
Three-Dimensional Integration of InAs Nanowires by Template-Assisted Selective Epitaxy on Tungsten
(
- Contribution to journal › Article
- 2020
-
Mark
Cross-Point Arrays with Low-Power ITO-HfO2 Resistive Memory Cells Integrated on Vertical III-V Nanowires
(
- Contribution to journal › Article
- 2015
-
Mark
Fabrication and analysis of vertical p-type InAs-Si nanowire tunnel FETs
2015) 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2015 p.61-64(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Vertical InAs-Si gate-all-around tunnel FETs integrated on Si using selective epitaxy in nanotube templates
(
- Contribution to journal › Article
- 2014
-
Mark
Vertical III-V nanowire device integration on Si(100)
(
- Contribution to journal › Article
-
Mark
III-V semiconductor nanowires for future devices
2014) 17th Design, Automation and Test in Europe, DATE 2014(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
Geometric model for metalorganic vapour phase epitaxy of dense nanowire arrays
(
- Contribution to journal › Article
- 2012
-
Mark
Antimonide Heterostructure Nanowires - Growth, Physics and Devices
2012)(
- Thesis › Doctoral thesis (compilation)
- 2011
-
Mark
Interface composition of InAs nanowires with Al2O2 and HfO2 thin films
(
- Contribution to journal › Article
- 2008
-
Mark
High-Quality InAs/InSb Nanowire Heterostructures Grown by Metal-Organic Vapor-Phase Epitaxy.
(
- Contribution to journal › Article