Digital ASIC-lup-obsolete
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- 2010
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Mark
Laboratory instructions as a cause of student dissonance
2010) LTHs 6:e Pedagogiska Inspirationskonferens, 2010(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Complexity reductions in unrolled CORDIC architectures
2010) The 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2009)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Implementation of an SVD Based MIMO OFDM channel estimator
2010) Norchip Conference, 2009(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A
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- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Minimum-energy sub-threshold self-timed circuits: design methodology and a case study
2010) The 16th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
High speed low power Soft-Output Viterbi decoder
2010) 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) p.376-379(
- Contribution to conference › Paper, not in proceeding
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Mark
Energy efficiency in Sub-VT of various 16-bit adder structures in 65 nm CMOS
2010) Swedish System-on-Chip Conference 2010 (SSoCC'10)(
- Contribution to conference › Paper, not in proceeding
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Parabolic synthesis methodology
2010) GigaHertz Symposium, 2010(
- Contribution to conference › Paper, not in proceeding
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Mark
Power Constrained Test Scheduling for 3D Stacked Chips: poster
2010) 1st IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits(
- Contribution to conference › Poster
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Mark
Power consumption in digital filter architectures in 65 nm CMOS technology
2010) GigaHertz Symposium, 2010(
- Contribution to conference › Paper, not in proceeding