Olli-Pekka Kilpi (Former)

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2019
Mark Low-temperature back-end-of-line technology compatible with III-V nanowire MOSFETs
Andric, Stefan ^LU ; Ohlsson Fhager, Lars ^LU ; Lindelöw, Fredrik ^LU ; Kilpi, Olli Pekka ^LU and Wernersson, Lars Erik ^LU (2019) In Journal of Vacuum Science and Technology B: Nanotechnology and Microelectronics 37(6).
- Contribution to journal › Article
2018
Mark Sub-100-nm gate-length scaling of vertical InAs/InGaAs nanowire MOSFETs on Si
Kilpi, Olli Pekka ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2018) 63rd IEEE International Electron Devices Meeting, IEDM 2017 Part F134366. p.1-17
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
2017
Mark Vertical heterojunction InAs/InGaAs nanowire MOSFETs on Si with I_on = 330 μa/μm at I_off = 100 nA/μm and V_D = 0.5 v
Kilpi, Olli Pekka ^LU ; Wu, Jun ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2017) 37th Symposium on VLSI Technology, VLSI Technology 2017 p.36-37
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Vertical InAs/InGaAs Heterostructure Metal-Oxide-Semiconductor Field-Effect Transistors on Si
Kilpi, Olli Pekka ^LU ; Svensson, Johannes ^LU ; Wu, Jun ^LU ; Persson, Axel R. ^LU ; Wallenberg, Reine ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2017) In Nano Letters 17(10). p.6006-6010
- Contribution to journal › Article
Mark Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs
Hellenbrand, Markus ^LU ; Memisevic, Elvedin ^LU ; Berg, Martin ; Kilpi, Olli-Pekka ^LU ; Svensson, Johannes ^LU and Wernersson, Lars-Erik ^LU (2017) In IEEE Electron Device Letters
- Contribution to journal › Letter
2016
Mark Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
Berg, Martin ^LU ; Kilpi, Olli-Pekka ^LU ; Persson, Karl-Magnus ^LU ; Svensson, Johannes ^LU ; Hellenbrand, Markus ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2016) In IEEE Electron Device Letters 37(8). p.966-969
- Contribution to journal › Letter
Mark Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si
Berg, Martin ^LU ; Persson, Karl-Magnus ^LU ; Kilpi, Olli-Pekka ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2016) 61st IEEE International Electron Devices Meeting, IEDM 2015 2016-February.
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding

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