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- 2024
-
Mark
Source Design of Vertical III-V Nanowire Tunnel Field-Effect Transistors
(
- Contribution to journal › Article
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Mark
A Reconfigurable Ferroelectric Transistor as An Ultra-Scaled Cell for Low-Power In-Memory Data Processing
2024) In Advanced Electronic Materials(
- Contribution to journal › Article
-
Mark
TFET Circuit Configurations Operating below 60 mV/dec
(
- Contribution to journal › Article
- 2023
-
Mark
Geometric control of diffusing elements on InAs semiconductor surfaces via metal contacts
(
- Contribution to journal › Article
-
Mark
High Current Density Vertical Nanowire TFETs With I₆₀ > 1
μ
A/
μ
m
(
- Contribution to journal › Article
-
Mark
High-k/InGaAs interface defects at cryogenic temperature
(
- Contribution to journal › Article
-
Mark
Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
(
- Contribution to journal › Article
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Mark
gm/Id Analysis of vertical nanowire III–V TFETs
(
- Contribution to journal › Article
-
Mark
Dynamics of Polarization Switching in Mixed Phase Ferroelectric-Antiferroelectric HZO Thin Films
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors
(
- Contribution to journal › Article