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2021
Mark High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon
Mamidala, Saketh, Ram ^LU ; Persson, Karl-Magnus ^LU ; Irish, Austin ^LU ; Jönsson, Adam ^LU ; Timm, Rainer ^LU and Wernersson, Lars-Erik ^LU (2021) In Nature Electronics p.914-914
- Contribution to journal › Article
2020
Mark A method for estimating defects in ferroelectric thin film MOSCAPs
Persson, Anton E. O. ^LU ; Atle, Robin ^LU ; Svensson, Johannes ^LU ; Borg, Mattias ^LU and Wernersson, Lars-Erik ^LU (2020) In Applied Physics Letters 117(24).
- Contribution to journal › Article
Mark III-V Nanowire MOSFETs : RF-Properties and Applications
Wernersson, Lars Erik ^LU (2020) 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2020
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Low temperature scanning tunneling microscopy and spectroscopy on laterally grown In_xGa_1-xAs nanowire devices
Liu, Yen Po ^LU ; Södergren, Lasse ^LU ; Mousavi, S. Fatemeh ^LU ; Liu, Yi ^LU ; Lindelöw, Fredrik ^LU ; Lind, Erik ^LU ; Timm, Rainer ^LU and Mikkelsen, Anders ^LU (2020) In Applied Physics Letters 117(16).
- Contribution to journal › Article
Mark Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU ; Memisevic, Elvedin ^LU ; Zhu, Zhongyunshen ^LU ; Persson, Axel R. ^LU ; Lind, Erik ^LU ; Wallenberg, Lars Reine ^LU and Wernersson, Lars Erik ^LU (2020) In ACS Applied Electronic Materials 2(9). p.2882-2887
- Contribution to journal › Article
Mark Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving S_min= 32 mV/dec and g_m/I_D= 100 V^-1
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2020) 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020 p.17-18
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Mobility of near surface MOVPE grown InGaAs/InP quantum wells
Södergren, Lasse ^LU ; Garigapati, Navya Sri ^LU ; Borg, Mattias ^LU and Lind, Erik ^LU (2020) In Applied Physics Letters 117(1).
- Contribution to journal › Article
Mark Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon
Mamidala, Saketh, Ram ^LU ; Persson, Karl-Magnus ^LU ; Borg, Mattias ^LU and Wernersson, Lars-Erik ^LU (2020) In IEEE Electron Device Letters 41(9). p.1432-1435
- Contribution to journal › Article
Mark High-Performance Vertical III-V Nanowire MOSFETs on Si with g_m> 3 mS/μm
Kilpi, Olli Pekka ^LU ; Hellenbrand, Markus ^LU ; Svensson, Johannes ^LU ; Persson, Axel R. ^LU ; Wallenberg, Reine ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2020) In IEEE Electron Device Letters 41(8). p.1161-1164
- Contribution to journal › Article
Mark Strain mapping inside an individual processed vertical nanowire transistor using scanning X-ray nanodiffraction
Dzhigaev, Dmitry ^LU ; Svensson, Johannes ^LU ; Krishnaraja, Abinaya ^LU ; Zhu, Zhongyunshen ^LU ; Ren, Zhe ^LU ; Liu, Yi ^LU ; Kalbfleisch, Sebastian ^LU ; Björling, Alexander ^LU ; Lenrick, Filip ^LU and Balogh, Zoltan Imre , et al. (2020) In Nanoscale 12(27). p.14487-14493
- Contribution to journal › Article

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