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- 2021
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Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
(
- Contribution to journal › Article
- 2020
-
Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
(
- Contribution to journal › Article
-
Mark
Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs
(
- Contribution to journal › Article
-
Mark
Electrical Characterisation of III-V Nanowire MOSFETs
2020) In Series of Licentiate and Doctoral Theses(
- Thesis › Doctoral thesis (compilation)
- 2019
-
Mark
Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
2019) In Microelectronic Engineering(
- Contribution to journal › Article
- 2018
-
Mark
A Method for Determining Trap Distributions of Specific Channel Surfaces in InGaAs Tri-gate MOSFETs
(
- Contribution to journal › Article
- 2017
-
Mark
Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs
2017) In IEEE Electron Device Letters(
- Contribution to journal › Letter
- 2016
-
Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter