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- 2021
-
Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
(
- Contribution to journal › Article
- 2013
-
Mark
A High-Frequency Transconductance Method for Characterization of High-k Border Traps in III-V MOSFETs
(
- Contribution to journal › Article
- 2012
-
Mark
High-performance 15 nm diameter InAs nanowire Ω-gate MOSFETs
2012) GigaHertz Symposium 2012(
- Contribution to conference › Paper, not in proceeding
- 2005
-
Mark
Vertical high mobility wrap-gated InAs nanowire transistor
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
Design of resonant tunneling permeable base transistors
2004) 2003 International Symposium on Compound Semiconductors: Post-Conference Proceedings p.158-163(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding