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- 2020
-
Mark
A Decade Frequency Range CMOS Power Amplifier for Sub-6-GHz Cellular Terminals
(
- Contribution to journal › Article
- 2019
-
Mark
A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS
(
- Contribution to journal › Article
- 2018
-
Mark
A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers
(
- Contribution to journal › Article
- 2014
-
Mark
A Miniaturized Marchand Balun in CMOS With Improved Balance for Millimeter-Wave Applications
(
- Contribution to journal › Article
-
Mark
Lessons from Ten Years of the International Master’s Program in System-on-Chip
2014) The 10th European Workshop on Microelectronics Education (EWME 2014)(
- Contribution to conference › Paper, not in proceeding
- 2013
-
Mark
A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback
(
- Contribution to journal › Article
-
Mark
Ultra Low Energy Design Exploration of Digital Decimation Filters in 65 nm Dual-VT CMOS in the Sub-VT Domain
(
- Contribution to journal › Article
- 2011
-
Mark
Design and analysis of an ultra-low-power LC quadrature VCO
(
- Contribution to journal › Article
-
Mark
A 1.6-2.6GHz 29dBm Injection-Locked Power Amplifier with 64% peak PAE in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 5GHz 90-nm CMOS all digital phase-locked loop
(
- Contribution to journal › Article
-
Mark
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2010
-
Mark
A 90-nm CMOS +11dBm IIP3 4mW dual-band LNA for cellular handsets
(
- Contribution to journal › Letter
-
Mark
A technique for improving gain and noise figure of common-gate wideband LNAs
(
- Contribution to journal › Article
-
Mark
A 4.35-mW +22-dBm IIP3 continuously tunable channel select filter for WLAN/WiMax receivers in 90-nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Ultra low energy vs throughput design exploration of 65 nm sub-VT CMOS digital filters
2010) NORCHIP Conference, 2010(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 175uW 100MHz-2GHz inductorless receiver frontend in 65nm CMOS
2010) NORCHIP Conference, 2010(
- Contribution to conference › Paper, not in proceeding
-
Mark
K-band receiver front-ends in 0.13um CMOS using carrier technology
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2009
-
Mark
Analysis of a high frequency and wide bandwidth active polyphase filter based on CMOS inverters
(
- Contribution to journal › Article
-
Mark
A 5GHz 90-nm CMOS all digital phase-locked loop
(
- Contribution to conference › Paper, not in proceeding
- 2008
-
Mark
60 GHz 130-nm CMOS Second Harmonic Power Amplifiers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 5.4GHz 90-nm CMOS digitally controlled LC oscillator with 21% tuning range, 1.1MHz resolution, and 180dB FOM
2008) Norchip Conference, 2008(
- Contribution to conference › Paper, not in proceeding
-
Mark
A 1W Class-D Audio Power Amplifier in a 0.35um CMOS Process
2008) Norchip Conference, 2008(
- Contribution to conference › Paper, not in proceeding
-
Mark
Two 130nm CMOS class-D RF power amplifiers suitable for polar transmitter architectures
(
- Contribution to conference › Paper, not in proceeding
- 2007
-
Mark
Measured CMOS Switched High-Quality Capacitors in a Reconfigurable Matching Network
(
- Contribution to journal › Article
-
Mark
A polyphase filter based on CMOS inverters
(
- Contribution to journal › Article
-
Mark
A 26-GHz LC-QVCO in 0.13-um CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Measured CMOS Reconfigurable Matching Network and its Switched High Quality Capacitor Building Blocks
2007) Swedish System-on-Chip Conference 2007 (SSoCC’07)(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2006
-
Mark
Full oscillation cycle phase noise analysis of differential CMOS LC oscillators
(
- Contribution to journal › Article
-
Mark
Impedance Tuning Unit for DVB-H Front-End
2006) SSoCC (Swedish System-on-Chip Conference), 2006(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2005
-
Mark
A distributed capacitance analysis of co-planar inductors for a CMOS QVCO with varactor tuned buffer stage
(
- Contribution to journal › Article
-
Mark
An adaptive impedance tuning CMOS circuit for ISM 2.4-GHz band
2005) In IEEE Transactions on Circuits and Systems Part 1: Fundamental Theory and Applications 52(6). p.1115-1124(
- Contribution to journal › Article
- 2003
-
Mark
A merged CMOS LNA and mixer for a WCDMA receiver
(
- Contribution to journal › Article
-
Mark
A bootstrapping technique to improve the linearity of CMOS passive mixers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2002
-
Mark
Tail current noise suppression in RF CMOS VCOs
(
- Contribution to journal › Article
- 1997
-
Mark
Design and Analysis of Highly Linear Integrated Wideband Amplifiers
1997)(
- Thesis › Doctoral thesis (compilation)
-
Mark
A novel class AB CMOS power amplifier
(
- Contribution to journal › Article