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- 2017
-
Mark
Properties of III-V nanowires : MOSFETs and TunnelFETs
2017) 2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 p.99-100(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Parallel-Coupled Quantum Dots in InAs Nanowires
(
- Contribution to journal › Article
- 2016
-
Mark
RF Characterization of Vertical Wrap-Gated InAs/High-κ Nanowire Capacitors
(
- Contribution to journal › Article
-
Mark
Ballistic modeling of InAs nanowire transistors
(
- Contribution to journal › Article
-
Mark
3-D Integrated Track-and-Hold Circuit Using InAs Nanowire MOSFETs and Capacitors
(
- Contribution to journal › Article
-
Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter
-
Mark
Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 1 : Experimental Devices
(
- Contribution to journal › Article
-
Mark
Electronic structures of [1 1 1]-oriented free-standing InAs and InP nanowires
(
- Contribution to journal › Article
-
Mark
Amplifier Design Using Vertical InAs Nanowire MOSFETs
(
- Contribution to journal › Article
-
Mark
Electrical Characterization of III-V Nanostructure
2016)(
- Thesis › Doctoral thesis (compilation)