Johannes Svensson
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- 2018
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Mark
Sub-100-nm gate-length scaling of vertical InAs/InGaAs nanowire MOSFETs on Si
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
CMOS Integration Based on All-III-V Materials
(2018) Swedish Microwave Days 2018
- Contribution to conference › Abstract
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Mark
Vertical, High-Performance 12 nm diameter InAs Nanowire MOSFETs on Si using an all III-V CMOS process
(2018) Compound Semiconductor Week 2018
- Contribution to conference › Abstract
-
Mark
Block Copolymer Nanopatterning of Dielectric Mask for Selective Area InAs Vertical Nanowire Growth
(2018) 4-th International Symposium on DSA, November 11-13, 2018, Sapporo, Japan
- Contribution to conference › Abstract
- 2017
-
Mark
Statistics of InAs/InGaAsSb/GaSb TFETs with sub-50 mV/decade operation at VDS of 0.3V
(2017) Compound Semiconductor Week 2017
- Contribution to conference › Paper, not in proceeding
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Mark
Random telegraph signal noise in tunneling field-effect transistors with S below 60 mV/decade
(2017) p.38-41
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Impact of Band-Tails on the Subthreshold Swing of III-V Tunnel Field-Effect Transistor
- Contribution to journal › Letter
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Mark
Vertical InAs/InGaAs Heterostructure Metal-Oxide-Semiconductor Field-Effect Transistors on Si
- Contribution to journal › Article
-
Mark
Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs
(2017) In IEEE Electron Device Letters
- Contribution to journal › Letter
-
Mark
InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors
- Contribution to journal › Article
