Erik Lind
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- 2020
-
Mark
Vertical nanowire III–V MOSFETs with improved high-frequency gain
- Contribution to journal › Article
-
Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
- Contribution to journal › Article
-
Mark
III-V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications
- Contribution to journal › Article
- 2019
-
Mark
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
- Contribution to journal › Article
-
Mark
Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
(2019) In Microelectronic Engineering
- Contribution to journal › Article
-
Mark
Fabrication of Tunnel FETs demonstrating sub-thermal subthreshold slope
(2019) 21th International Vacuum Congress
- Contribution to conference › Abstract
-
Mark
Comparison of Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
(2019) Insulating Films on Semiconductors (INFOS)
- Contribution to conference › Paper, not in proceeding
-
Mark
Reducing ambipolar off-state leakage currents in III-V vertical nanowire tunnel FETs using gate-drain underlap
- Contribution to journal › Article
- 2018
-
Mark
Impact of source doping on the performance of vertical InAs/InGaAsSb/GaSb nanowire Tunnel Field-Effect Transistors
- Contribution to journal › Article
-
Mark
RF Characterisation of Vertical III-V Nanowire Tunnel FETs
(2018) Swedish Microwave Days 2018
- Contribution to conference › Paper, not in proceeding
