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- 2022
-
Mark
Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
- Contribution to journal › Article
-
Mark
Integration of Ferroelectric HfxZr1-xO2 on Vertical III-V Nanowire Gate-All-Around FETs on Silicon
- Contribution to journal › Article
-
Mark
Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
- Contribution to journal › Article
-
Mark
Top Electrode Engineering for Freedom in Design and Implementation of Ferroelectric Tunnel Junctions Based on Hf1- xZrxO2
- Contribution to journal › Article
-
Mark
Strained Inx Ga(1-x )As/InP near surface quantum wells and MOSFETs
- Contribution to journal › Article
-
Mark
A 4F2 Vertical Gate-all-around Nanowire Compute-in-memory Device Integrated in (1T1R) Cross-Point Arrays on Silicon
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2021
-
Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
- Contribution to journal › Article
-
Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
- Contribution to journal › Article
-
Mark
III-V Nanowire MOSFET High-Frequency Technology Platform
(2021)
- Thesis › Doctoral thesis (compilation)
-
Mark
Controlling Filament Stability in Scaled Oxides (3 nm) for High Endurance (>106) Low Voltage ITO/HfO2 RRAMs for Future 3D Integration
(2021) 2021 Device Research Conference (DRC)
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
