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- 2016
-
Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
Berg, Martin LU ; Kilpi, Olli-Pekka LU ; Persson, Karl-Magnus LU ; Svensson, Johannes LU ; Hellenbrand, Markus LU ; Lind, Erik LU
and Wernersson, Lars-Erik
LU
(2016)
In IEEE Electron Device Letters
37(8).
p.966-969
- Contribution to journal › Letter
- 2015
-
Mark
Vertical InAs/GaSb Nanowire Axial TFETs Integrated on Si-substrates
Memisevic, Elvedin LU ; Svensson, Johannes LU ; Lind, Erik LU
and Wernersson, Lars-Erik
LU
(2015)
Compound Semiconductor Week 2015
- Contribution to conference › Paper, not in proceeding
-
Mark
III-V Heterostructure Nanowire Tunnel FETs
Lind, Erik LU
; Memisevic, Elvedin
LU
; Dey, Anil
LU
and Wernersson, Lars-Erik
LU
(2015)
In IEEE Journal of the Electron Devices Society
3(3).
p.96-102
- Contribution to journal › Article