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- 2019
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Mark
Transition to the quantum hall regime in InAs nanowire cross-junctions
(
- Contribution to journal › Article
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Facet-selective group-III incorporation in InGaAs template assisted selective epitaxy
(
- Contribution to journal › Article
- 2018
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Mark
Towards Nanowire Tandem Junction Solar Cells on Silicon
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- Contribution to journal › Article
- 2017
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Mark
Ballistic one-dimensional transport in InAs nanowires monolithically integrated on silicon
(
- Contribution to journal › Article
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Mark
Observation of twin-free GaAs nanowire growth using template-assisted selective epitaxy
(
- Contribution to journal › Article
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Mark
Ballistic One-Dimensional InAs Nanowire Cross-Junction Interconnects
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- Contribution to journal › Article
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Mark
High-Mobility GaSb Nanostructures Cointegrated with InAs on Si
(
- Contribution to journal › Article
- 2016
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Mark
Complementary III-V heterojunction lateral NW Tunnel FET technology on Si
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 1 : Experimental Devices
(
- Contribution to journal › Article
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Mark
III-V heterojunction nanowire tunnel FETs monolithically integrated on silicon
2016) 11th IEEE Nanotechnology Materials and Devices Conference, NMDC 2016(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 2 : Simulation Study of the Impact of Interface Traps
(
- Contribution to journal › Article
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Mark
Investigation of doping in InAs/GaSb hetero-junctions for tunnel-FETs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2015
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Mark
Mechanisms of template-assisted selective epitaxy of InAs nanowires on Si
(
- Contribution to journal › Article
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Mark
III-V device integration on Si using template-assisted selective epitaxy
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Vertical InAs-Si gate-all-around tunnel FETs integrated on Si using selective epitaxy in nanotube templates
(
- Contribution to journal › Article
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Mark
Fabrication and analysis of vertical p-type InAs-Si nanowire tunnel FETs
2015) 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2015 p.61-64(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
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Mark
III-V semiconductor nanowires for future devices
2014) 17th Design, Automation and Test in Europe, DATE 2014(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Vertical III-V nanowire device integration on Si(100)
(
- Contribution to journal › Article