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- 2021
-
Mark
Reconfigurable multi-access pattern vector memory for real-time orb feature extraction
2021) 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 In Proceedings - IEEE International Symposium on Circuits and Systems 2021-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Analysis and design of an 1-20 GHz track and hold circuit
2021) 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 In Proceedings - IEEE International Symposium on Circuits and Systems 2021-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An application specific vector processor for CNN-based massive MIMO positioning
2021) 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 In Proceedings - IEEE International Symposium on Circuits and Systems 2021-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2020
-
Mark
Noise-resilient and interpretable epileptic seizure detection
2020) 52nd IEEE International Symposium on Circuits and Systems, ISCAS 2020 In Proceedings - IEEE International Symposium on Circuits and Systems 2020-October.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
e-Glass: A Wearable System for Real-Time Detection of Epileptic Seizures
2018) 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 In Proceedings - IEEE International Symposium on Circuits and Systems 2018-May.(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2014
-
Mark
An 11mW Continuous Time Delta-Sigma Modulator with 20 MHz Bandwidth in 65nm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Hardware Efficient Approximative Matrix Inversion for Linear Pre-Coding in Massive MIMO
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 65 nm Single Stage 28 fJ/cycle 0.12 to 1.2V Level-Shifter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A 1-1 MASH 2-D Vernier Time-to-Digital Converter with 2nd-order noise shaping
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2013
-
Mark
Analog and Digital Approaches for an Energy Efficient Low Complexity Channel Decoder
2013) IEEE International Symposium on Circuits and Systems (ISCAS), 2013 In Proceedings - IEEE International Symposium on Circuits and Systems p.1564-1567(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A Wide Bandwidth Fractional-N Synthesizer for LTE with Phase Noise Cancellation Using a Hybrid- -DAC and Charge Re-timing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
High-Throughput Hardware-Efficient Soft-Input Soft-Output MIMO Detector for Iterative Receivers
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Hardware Acceleration of the Robust Header Compression (RoHC) Algorithm
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2012
-
Mark
A 90nm CMOS Digital PLL Based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Mapping Channel Estimation and MIMO Detection in LTE-Advanced on a Reconfigurable Cell Array
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A unified multi-mode MIMO detector with soft-output
2012) IEEE International Symposium on Circuits and Systems (ISCAS), 2012(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2011
-
Mark
Reconfigurable cell array for concurrent support of multiple radio standards by flexible mapping
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An Analog (7,5) Convolutional Decoder in 65 nm CMOS for Low Power Wireless Applications
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2010
-
Mark
A reconfigurable OFDM inner receiver implemented in the CAL dataflow language
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2007
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Mark
Real-time extraction of maximally stable extremal regions on an FPGA
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Implementation of a labeling algorithm based on contour tracing with feature extraction
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Accelerating vector operations by utilizing reconfigurable coprocessor architectures
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 10-bit 500-MS/s 124-mW subranging folding ADC in 0.13 μm CMOS
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2004
-
Mark
A wavelet based R-wave detector for cardiac pacemakers in 0.35 CMOS technology
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
FPGA implementation of controller-datapath pair in custom image processor design
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2003
-
Mark
A differential difference comparator for multi-step A/D converters
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A digitally controlled PLL for digital SOCs
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A configurable divider using digit recurrence
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A 2048 complex point FFT processor using a novel data scaling approach
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2002
-
Mark
Bandwidth considerations for a CALLUM transmitter architecture
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Properties of RF bandpass amplifier topology with Q-enhancing
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
A direct digital RF amplitude modulator
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding