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2020
Mark Reduced annealing temperature for ferroelectric HZO on InAs with enhanced polarization
Persson, Anton E.O. ^LU ; Athle, Robin ^LU ; Littow, Pontus ; Persson, Karl Magnus ^LU ; Svensson, Johannes ^LU ; Borg, Mattias ^LU and Wernersson, Lars Erik ^LU (2020) In Applied Physics Letters 116(6).
- Contribution to journal › Article
Mark Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving S_min= 32 mV/dec and g_m/I_D= 100 V^-1
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU and Wernersson, Lars Erik ^LU (2020) 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020 p.17-18
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU ; Memisevic, Elvedin ^LU ; Zhu, Zhongyunshen ^LU ; Persson, Axel R. ^LU ; Lind, Erik ^LU ; Wallenberg, Lars Reine ^LU and Wernersson, Lars Erik ^LU (2020) In ACS Applied Electronic Materials 2(9). p.2882-2887
- Contribution to journal › Article
Mark Gate-Length Dependence of Vertical GaSb Nanowire p-MOSFETs on Si
Jönsson, Adam ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2020) In IEEE Transactions on Electron Devices 67(10). p.4118-4122
- Contribution to journal › Article
Mark Strain mapping inside an individual processed vertical nanowire transistor using scanning X-ray nanodiffraction
Dzhigaev, Dmitry ^LU ; Svensson, Johannes ^LU ; Krishnaraja, Abinaya ^LU ; Zhu, Zhongyunshen ^LU ; Ren, Zhe ^LU ; Liu, Yi ^LU ; Kalbfleisch, Sebastian ^LU ; Björling, Alexander ^LU ; Lenrick, Filip ^LU and Balogh, Zoltan Imre , et al. (2020) In Nanoscale 12(27). p.14487-14493
- Contribution to journal › Article
Mark A method for estimating defects in ferroelectric thin film MOSCAPs
Persson, Anton E. O. ^LU ; Atle, Robin ^LU ; Svensson, Johannes ^LU ; Borg, Mattias ^LU and Wernersson, Lars-Erik ^LU (2020) In Applied Physics Letters 117(24).
- Contribution to journal › Article
2019
Mark Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
Kilpi, Olli Pekka ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars Erik ^LU (2019) In IEEE Journal of the Electron Devices Society 7. p.70-75
- Contribution to journal › Article
Mark Balanced Drive Currents in 10–20 nm Diameter Nanowire All-III-V CMOS on Si
Jönsson, Adam ^LU ; Svensson, Johannes ^LU and Wernersson, Lars-Erik ^LU (2019) 64th IEEE International Electron Devices Meeting p.1-39
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
Mark Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
Hellenbrand, Markus ^LU ; Kilpi, Olli-Pekka ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2019) In Microelectronic Engineering
- Contribution to journal › Article
Mark Fabrication of Tunnel FETs demonstrating sub-thermal subthreshold slope
Krishnaraja, Abinaya ^LU ; Svensson, Johannes ^LU ; Lind, Erik ^LU and Wernersson, Lars-Erik ^LU (2019) 21th International Vacuum Congress
- Contribution to conference › Abstract

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