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- 2023
-
Mark
Effects of Interface Oxidation on Noise Properties and Performance in III–V Vertical Nanowire Memristors
(
- Contribution to journal › Article
- 2021
-
Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
(
- Contribution to journal › Article
- 2020
-
Mark
Cross-Point Arrays with Low-Power ITO-HfO2 Resistive Memory Cells Integrated on Vertical III-V Nanowires
(
- Contribution to journal › Article
-
Mark
Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs
(
- Contribution to journal › Article
-
Mark
Vertical nanowire III–V MOSFETs with improved high-frequency gain
(
- Contribution to journal › Article
-
Mark
Low-Power Resistive Memory Integrated on III-V Vertical Nanowire MOSFETs on Silicon
(
- Contribution to journal › Article
-
Mark
Gate-Length Dependence of Vertical GaSb Nanowire p-MOSFETs on Si
(
- Contribution to journal › Article
-
Mark
Strain mapping inside an individual processed vertical nanowire transistor using scanning X-ray nanodiffraction
(
- Contribution to journal › Article
- 2018
-
Mark
Effect of Gate Oxide Defects on Tunnel Transistor RF Performance
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2017
-
Mark
Random telegraph signal noise in tunneling field-effect transistors with S below 60 mV/decade
2017) p.38-41(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding