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- 2022
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Mark
Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing
(
- Contribution to journal › Article
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Mark
Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
(
- Contribution to journal › Article
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Mark
Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
(
- Contribution to journal › Article
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Mark
Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages
(
- Contribution to journal › Article
- 2021
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Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
(
- Contribution to journal › Article
- 2020
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Mark
Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
(
- Contribution to journal › Article
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Mark
Feature size control using surface reconstruction temperature in block copolymer lithography for InAs nanowire growth
(
- Contribution to journal › Article
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Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
(
- Contribution to journal › Article
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Mark
Compressively-strained GaSb nanowires with core-shell heterostructures
(
- Contribution to journal › Article
- 2019
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Mark
Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
2019) In Microelectronic Engineering(
- Contribution to journal › Article