Johannes Svensson
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- 2022
-
Mark
Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
- Contribution to journal › Article
-
Mark
Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
- Contribution to journal › Article
-
Mark
Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages
- Contribution to journal › Article
-
Mark
Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing
- Contribution to journal › Article
- 2021
-
Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
- Contribution to journal › Article
-
Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
- Contribution to journal › Article
- 2020
-
Mark
Vertical nanowire III–V MOSFETs with improved high-frequency gain
- Contribution to journal › Article
-
Mark
Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
- Contribution to journal › Article
-
Mark
Feature size control using surface reconstruction temperature in block copolymer lithography for InAs nanowire growth
- Contribution to journal › Article
-
Mark
Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving Smin= 32 mV/dec and gm/ID= 100 V-1
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
