Johannes Svensson
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- 2022
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Mark
Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
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- Contribution to journal › Article
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Mark
Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
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- Contribution to journal › Article
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Mark
Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing
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- Contribution to journal › Article
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Mark
Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
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- Contribution to journal › Article
- 2021
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Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
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- Contribution to journal › Article
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Mark
Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance
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- Contribution to journal › Article
- 2020
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Mark
Vertical nanowire III–V MOSFETs with improved high-frequency gain
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- Contribution to journal › Article
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Mark
Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs
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- Contribution to journal › Article
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Mark
Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving Smin= 32 mV/dec and gm/ID= 100 V-1
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Gate-Length Dependence of Vertical GaSb Nanowire p-MOSFETs on Si
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- Contribution to journal › Article