Lars-Erik Wernersson
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- 2020
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Mark
III-V Nanowire MOSFETs : RF-Properties and Applications
(2020) 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2020
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
A method for estimating defects in ferroelectric thin film MOSCAPs
- Contribution to journal › Article
- 2019
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Mark
Vertical Gate-All-Around Nanowire GaSb-InAs Core-Shell n-Type Tunnel FETs
- Contribution to journal › Article
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Mark
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
- Contribution to journal › Article
-
Mark
Low-Temperature Front-Side BEOL Technology with Circuit Level Multiline Thru-Reflect-Line Kit for III-V MOSFETs on Silicon
(2019) 92nd ARFTG Microwave Measurement Conference, ARFTG 2019
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Trap-aware compact modeling and power-performance assessment of III-V tunnel FET
(2019) 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Low-Frequency Noise in Nanowire and Planar III-V MOSFETs
(2019) In Microelectronic Engineering
- Contribution to journal › Article
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Mark
Balanced Drive Currents in 10–20 nm Diameter Nanowire All-III-V CMOS on Si
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
An Experimental Study of Heterostructure Tunnel FET Nanowire Arrays : Digital and Analog Figures of Merit from 300K to 10K
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Fabrication of Tunnel FETs demonstrating sub-thermal subthreshold slope
(2019) 21th International Vacuum Congress
- Contribution to conference › Abstract
