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- 2022
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Mark
Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages
(
- Contribution to journal › Article
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Mark
Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing
(
- Contribution to journal › Article
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Mark
Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
(
- Contribution to journal › Article
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Mark
Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition
(
- Contribution to journal › Article
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Mark
A 4F2 Vertical Gate-all-around Nanowire Compute-in-memory Device Integrated in (1T1R) Cross-Point Arrays on Silicon
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2021
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Mark
Millimeter-Wave Vertical III-V Nanowire MOSFET Device-To-Circuit Co-Design
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- Contribution to journal › Article
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Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
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- Contribution to journal › Article
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Mark
High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon
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- Contribution to journal › Article
- 2020
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Mark
III-V Nanowire MOSFETs : RF-Properties and Applications
2020) 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2020(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
-
Mark
Compressively-strained GaSb nanowires with core-shell heterostructures
(
- Contribution to journal › Article