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- 2022
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Mark
Low-Temperature Characteristics of Nanowire Network Demultiplexer for Qubit Biasing
(
- Contribution to journal › Article
- 2021
-
Mark
Optimization of Near-Surface Quantum Well Processing
(
- Contribution to journal › Article
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Mark
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs with a Field Plate
(
- Contribution to journal › Article
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Mark
Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications
2021)(
- Thesis › Doctoral thesis (compilation)
- 2020
-
Mark
High-Performance Vertical III-V Nanowire MOSFETs on Si with gm> 3 mS/μm
(
- Contribution to journal › Article
-
Mark
III-V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications
(
- Contribution to journal › Article
- 2019
-
Mark
Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs
(
- Contribution to journal › Article
-
Mark
Vertical III-V Nanowire MOSFETs
2019) In Series of licentiate and doctoral theses(
- Thesis › Doctoral thesis (compilation)
-
Mark
Low-complexity III-V circuitry for millimeter wave communication and radar
2019) 2019 IEEE Globecom Workshops, GC Wkshps 2019 In 2019 IEEE Globecom Workshops, GC Wkshps 2019 - Proceedings(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
- 2018
-
Mark
A Method for Determining Trap Distributions of Specific Channel Surfaces in InGaAs Tri-gate MOSFETs
(
- Contribution to journal › Article