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- 2016
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Mark
RF Characterization of Vertical Wrap-Gated InAs/High-κ Nanowire Capacitors
(
- Contribution to journal › Article
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Mark
InGaAs nanowire MOSFETs with ION = 555 μa/μm at IOFF = 100 nA/μm and VDD = 0.5 v
2016) 36th IEEE Symposium on VLSI Technology, VLSI Technology 2016(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
InAs nanowire GAA n-MOSFETs with 12-15 nm diameter
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
High-frequency InGaAs tri-gate MOSFETs with fmax of 400 GHz
(
- Contribution to journal › Article
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Mark
Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si
(
- Contribution to journal › Letter
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Mark
Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si
(
- Chapter in Book/Report/Conference proceeding › Paper in conference proceeding
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Mark
Effect of Gate Voltage Stress on InGaAs MOSFET with HfO2 or Al2O3 Dielectric
(
- Contribution to journal › Article
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Mark
3-D Integrated Track-and-Hold Circuit Using InAs Nanowire MOSFETs and Capacitors
(
- Contribution to journal › Article
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Mark
Amplifier Design Using Vertical InAs Nanowire MOSFETs
(
- Contribution to journal › Article
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Mark
ZrO2 and HfO2 dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatment
(
- Contribution to journal › Article